Re: [OT] SPARC (was Re: The integral type 'byte')

On 2025-03-28, Michael S <already5chosen@yahoo.com> wrote:

On Fri, 28 Mar 2025 13:20:35 +0100
Janis Papanagnou <janis_papanagnou+ng@hotmail.com> wrote:
>

On 28.03.2025 11:26, Michael S wrote:

 
You didn't ever programmed in SPARC asm. Your reading of SPARC
documents was so shallow that you didn't pay attention to highly
visible distinguishing feature as branch delay slot. 

 
Yes. I clearly said that; I spoke about a technical detail that
I found interesting, no more, no less.
 

Could I guess that you didn't ever programmed in 68K asm, x86 asm,
NS32k asm, MIPS asm etc... ? Could I guess that your reading of
respective ISA docs was also similarly shallow? Could I guess that
the only non-8-bitters that you ever programmed in asm were one or
couple of TMS3202x DSPs? 

 
Just to understand; do you consider the 68k to be an "8-bitter"?

>
No, 68K was sold as "16-bit", but by modern use of the terms it is
32-bit CPU.

It was probably a mistake to sell it that way.

While 16 bit would have assured systems designers that the processor
could work with existing hardware design based around a 16 bit
data buses, it kind of undersold the processor.

Can you imagine; you design a processor with a decent number of 32 bit
address and data registers, and internal data paths.  And then your
sales people go around with 16 bit narratives.

I wonder whether, had the MC86K featured a 32x32->64 multiplication
instruction (later featured in the MC68020), would it still have
been sold as 16 bit?


--
TXR Programming Language: http://nongnu.org/txr
Cygnal: Cygwin Native Application Library: http://kylheku.com/cygnal
Mastodon: @Kazinator@mstdn.ca