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John Ames <commodorejohn@gmail.com> wrote:The TMS-9900 was from an odd place in the technologyOn Sat, 14 Jun 2025 00:29:12 -0400A similar effect played out in the HP3000 stack based CPU systems [1]
c186282 <c186282@nnada.net> wrote:
>I've done TMS-9900 programming ... odd but interesting chip. Seems to>
have evolved when there was little diff between on-chip cache memory
and main memory (not the tech to PUT a lot of ram into the CPU
either). Also had a sort of hardware solution to multi-user/multi-
processing which was very unique. Still remember "BLWP" - Branch And
Load Workspace Pointer". The 990 minis weren't so bad.
Always found that one intriguing. Yeah, like the 6502's zero-page, it's
a design from a different era as far as CPU-vs.-RAM-speed goes, but a
clever design-around for fairly elegant multi-tasking in light of it.
Oneathesedays I wanna take one of the later iterations (the TMS99105,
IIRC, is the last one that kept the memory-resident register-file
property; some later TI microcontrollers borrow the basic architecture,
but ditch that) and throw together a little homebrew hobbyist system...
The stack was kept in memory, and the CPU only had "registers" for the
top two, four or eight stack slots.
But reality was that all the way up until somewhere around the iapx286
time range, RAM memory was faster than the CPU's it was attached to, so
large register files on the CPU, or giant caches, were not needed. The
CPU was as fast as it was, and the RAM wasn't what was holding it back.
After sometime around the 286 time range, CPU speed started greatly
outpacing RAM speed and large on chip register files and caches (the
bigger the better) came into play.
[1] https://en.wikipedia.org/wiki/HP3000#Use_of_stack_instead_of_registers
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