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"Bill Sloman" <bill.sloman@ieee.org> wrote in message news:vmlpii$364is$7@dont-email.me...Check simulation at 180 msOn 15/01/2025 11:33 pm, Bill Sloman wrote:>This just reworks my circuit to use a controllable asymmetric current mirror instead of the FET for gain control. I take the>
feedback from the full wave rectifier and switch every half-cycle to reconstruct a variable amplitude sine wave to control the
output amplitude. It does use a lot of components, but it strikes me as fairly comprehensible.
>
R30 isn't a real part - it's just there to let me do an FFT on the correction signal.
>
The circuit just copes with worst case capacitors - 15.15nF and 14.85nF - at C5 and C6, as it was intended to do. Using a trim
pot to take out component tolerances would let you get away with a smaller correction signal injecting smaller doses of the odd
harmonics.
>
The circuit does cry out for monolithic dual transisors.The On-Semi
NST45010MW6T1G pnp and the
NST45011MW6T1G npn parts are cheap and widely available.
There was a dumb error in the original circuit. The two transistor switch (Q5 and Q6 in the original circuit) that turned the
full wave rectified waveform back into a sine wave was set up with very little headroom. It didn't stop the circuit from working
as intended after it had settled down, but it made start-up a bit tricky.
>
Here's the corrected version. It's performance isn't noticeably differ
>
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