Re: LTSpice model for a SiC MOSFET

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Sujet : Re: LTSpice model for a SiC MOSFET
De : bill.sloman (at) *nospam* ieee.org (Bill Sloman)
Groupes : sci.electronics.design
Date : 21. May 2025, 07:46:39
Autres entêtes
Organisation : A noiseless patient Spider
Message-ID : <100jssl$2n1hq$3@dont-email.me>
References : 1 2 3 4 5 6 7 8 9 10 11
User-Agent : Mozilla Thunderbird
On 21/05/2025 12:42 pm, john larkin wrote:
On Wed, 21 May 2025 03:15:01 +1000, Bill Sloman <bill.sloman@ieee.org>
wrote:
 
On 21/05/2025 1:44 am, john larkin wrote:
On Tue, 20 May 2025 10:53:58 -0400, legg <legg@nospam.magma.ca> wrote:
>
On Tue, 20 May 2025 17:49:54 +1000, Bill Sloman <bill.sloman@ieee.org>
wrote:
>
On 20/05/2025 5:48 am, legg wrote:
On Tue, 20 May 2025 03:21:37 +1000, Bill Sloman <bill.sloman@ieee.org>
wrote:
>
On 19/05/2025 11:33 pm, legg wrote:
On Mon, 19 May 2025 12:23:54 +1000, Bill Sloman <bill.sloman@ieee.org>
wrote:
>
On 19/05/2025 12:15 am, john larkin wrote:
On Sun, 18 May 2025 18:11:58 +1000, Bill Sloman <bill.sloman@ieee.org>
wrote:
>
<snip>
>
Bill,  the Baxandal cct is great in lower voltage input applications,
but the one thing you don't want to do with HV sources is ADD voltage
stress.
>
Bax is, as the saying goes, "component rich."
>
It's a more complicated circuit than John Larkin likes to play with.
>
It's got a special purpose transformer, the feed inductor and two
switching transistors. In theory you have to add a capacitor across the
transformer to create the resonant tank, but for the application I'm
talking about it may be difficult to wind the transformer with a low
enough parallel capacitance to get the sort of resonant frequency I'd
like to see.
>
That's not a lot of components.
 It doesn't matter how complex your circuits are, since they will never
be built.
You do like to think that. The last time that I went to the trouble and expense of getting something built, it let us find another low-level noise source which made it useless in the intended application.
I can afford that kind of minor extravagance, but I do try to avoid it.
--
Bill Sloman, Sydney

Date Sujet#  Auteur
18 May 25 * LTSpice model for a SiC MOSFET125Bill Sloman
18 May 25 +* Re: LTSpice model for a SiC MOSFET62john larkin
19 May 25 i`* Re: LTSpice model for a SiC MOSFET61Bill Sloman
19 May 25 i +* Re: LTSpice model for a SiC MOSFET34john larkin
19 May 25 i i`* Re: LTSpice model for a SiC MOSFET33Bill Sloman
19 May 25 i i +* Re: LTSpice model for a SiC MOSFET16john larkin
19 May 25 i i i`* Re: LTSpice model for a SiC MOSFET15Bill Sloman
19 May 25 i i i `* Re: LTSpice model for a SiC MOSFET14Edward Rawde
19 May 25 i i i  +* Re: LTSpice model for a SiC MOSFET2john larkin
20 May 25 i i i  i`- Re: LTSpice model for a SiC MOSFET1Bill Sloman
20 May 25 i i i  `* Re: LTSpice model for a SiC MOSFET11Bill Sloman
20 May 25 i i i   `* Re: LTSpice model for a SiC MOSFET10Mike Perkins
20 May 25 i i i    `* Re: LTSpice model for a SiC MOSFET9Bill Sloman
20 May 25 i i i     `* Re: LTSpice model for a SiC MOSFET [OT]8Liz Tuddenham
21 May 25 i i i      `* Re: LTSpice model for a SiC MOSFET [OT]7legg
21 May 25 i i i       +* Re: LTSpice model for a SiC MOSFET [OT]5Liz Tuddenham
21 May 25 i i i       i`* Re: LTSpice model for a SiC MOSFET [OT]4john larkin
21 May 25 i i i       i +* Re: LTSpice model for a SiC MOSFET [OT]2Phil Hobbs
21 May 25 i i i       i i`- Re: LTSpice model for a SiC MOSFET [OT]1Bill Sloman
21 May 25 i i i       i `- Re: LTSpice model for a SiC MOSFET [OT]1Liz Tuddenham
21 May 25 i i i       `- Re: LTSpice model for a SiC MOSFET [OT]1Bill Sloman
19 May 25 i i `* Re: LTSpice model for a SiC MOSFET16Edward Rawde
19 May 25 i i  +* Re: LTSpice model for a SiC MOSFET2john larkin
20 May 25 i i  i`- Re: LTSpice model for a SiC MOSFET1Bill Sloman
20 May 25 i i  `* Re: LTSpice model for a SiC MOSFET13Bill Sloman
20 May 25 i i   `* Re: LTSpice model for a SiC MOSFET12Edward Rawde
20 May 25 i i    +- Re: LTSpice model for a SiC MOSFET1john larkin
20 May 25 i i    +- Re: LTSpice model for a SiC MOSFET1John R Walliker
20 May 25 i i    `* Re: LTSpice model for a SiC MOSFET9Bill Sloman
20 May 25 i i     `* Re: LTSpice model for a SiC MOSFET8Edward Rawde
21 May 25 i i      `* Re: LTSpice model for a SiC MOSFET7Bill Sloman
21 May 25 i i       `* Re: LTSpice model for a SiC MOSFET6Edward Rawde
21 May 25 i i        +- Re: LTSpice model for a SiC MOSFET1Bill Sloman
21 May 25 i i        `* Re: LTSpice model for a SiC MOSFET4john larkin
21 May 25 i i         +* Re: LTSpice model for a SiC MOSFET2Edward Rawde
21 May 25 i i         i`- Re: LTSpice model for a SiC MOSFET1Bill Sloman
21 May 25 i i         `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
19 May 25 i +* Re: LTSpice model for a SiC MOSFET20legg
19 May 25 i i+* Re: LTSpice model for a SiC MOSFET11Bill Sloman
19 May 25 i ii`* Re: LTSpice model for a SiC MOSFET10legg
20 May 25 i ii `* Re: LTSpice model for a SiC MOSFET9Bill Sloman
20 May 25 i ii  `* Re: LTSpice model for a SiC MOSFET8legg
20 May 25 i ii   +* Re: LTSpice model for a SiC MOSFET4john larkin
20 May 25 i ii   i`* Re: LTSpice model for a SiC MOSFET3Bill Sloman
21 May 25 i ii   i `* Re: LTSpice model for a SiC MOSFET2john larkin
21 May 25 i ii   i  `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
20 May 25 i ii   `* Re: LTSpice model for a SiC MOSFET3Bill Sloman
21 May 25 i ii    `* Re: LTSpice model for a SiC MOSFET2legg
21 May 25 i ii     `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
20 May 25 i i`* Re: LTSpice model for a SiC MOSFET8john larkin
20 May 25 i i `* Re: LTSpice model for a SiC MOSFET7Bill Sloman
26 May 25 i i  `* Re: LTSpice model for a SiC MOSFET6Cursitor Doom
26 May 25 i i   +* Re: LTSpice model for a SiC MOSFET2john larkin
26 May 25 i i   i`- Re: LTSpice model for a SiC MOSFET1Bill Sloman
26 May 25 i i   `* Re: LTSpice model for a SiC MOSFET3Bill Sloman
26 May 25 i i    `* Re: LTSpice model for a SiC MOSFET2Cursitor Doom
27 May 25 i i     `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
25 May 25 i `* Re: LTSpice model for a SiC MOSFET6JM
26 May 25 i  `* Re: LTSpice model for a SiC MOSFET5Bill Sloman
26 May 25 i   `* Re: LTSpice model for a SiC MOSFET4JM
26 May 25 i    `* Re: LTSpice model for a SiC MOSFET3Bill Sloman
27 May 25 i     `* Re: LTSpice model for a SiC MOSFET2JM
28 May 25 i      `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
18 May 25 +- Re: LTSpice model for a SiC MOSFET1legg
18 May 25 +* Re: LTSpice model for a SiC MOSFET6legg
19 May 25 i`* Re: LTSpice model for a SiC MOSFET5Bill Sloman
19 May 25 i `* Re: LTSpice model for a SiC MOSFET4legg
19 May 25 i  `* Re: LTSpice model for a SiC MOSFET3Bill Sloman
19 May 25 i   `* Re: LTSpice model for a SiC MOSFET2legg
20 May 25 i    `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
19 May 25 +* Re: LTSpice model for a SiC MOSFET37Liz Tuddenham
19 May 25 i+* Re: LTSpice model for a SiC MOSFET7john larkin
22 May 25 ii`* Re: LTSpice model for a SiC MOSFET6Liz Tuddenham
22 May 25 ii `* Re: LTSpice model for a SiC MOSFET5john larkin
22 May 25 ii  `* Re: LTSpice model for a SiC MOSFET4Liz Tuddenham
22 May 25 ii   `* Re: LTSpice model for a SiC MOSFET3john larkin
23 May 25 ii    `* Re: LTSpice model for a SiC MOSFET2Liz Tuddenham
23 May 25 ii     `- Re: LTSpice model for a SiC MOSFET1john larkin
20 May 25 i`* Re: LTSpice model for a SiC MOSFET29Bill Sloman
20 May 25 i +* Re: LTSpice model for a SiC MOSFET8Liz Tuddenham
20 May 25 i i`* Re: LTSpice model for a SiC MOSFET7Bill Sloman
21 May 25 i i `* Re: LTSpice model for a SiC MOSFET6Liz Tuddenham
21 May 25 i i  +* Re: LTSpice model for a SiC MOSFET3Bill Sloman
21 May 25 i i  i`* Re: LTSpice model for a SiC MOSFET2Liz Tuddenham
21 May 25 i i  i `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
21 May 25 i i  `* Re: LTSpice model for a SiC MOSFET2john larkin
21 May 25 i i   `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
20 May 25 i `* Re: LTSpice model for a SiC MOSFET20KevinJ93
21 May 25 i  `* Re: LTSpice model for a SiC MOSFET19Bill Sloman
22 May 25 i   `* Re: LTSpice model for a SiC MOSFET18KevinJ93
22 May 25 i    +* Re: LTSpice model for a SiC MOSFET8Bill Sloman
22 May 25 i    i`* Re: LTSpice model for a SiC MOSFET7piglet
22 May 25 i    i +* Re: LTSpice model for a SiC MOSFET3Bill Sloman
22 May 25 i    i i`* Re: LTSpice model for a SiC MOSFET2piglet
23 May 25 i    i i `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
22 May 25 i    i +* Re: LTSpice model for a SiC MOSFET2john larkin
22 May 25 i    i i`- Re: LTSpice model for a SiC MOSFET1Bill Sloman
23 May 25 i    i `- Re: LTSpice model for a SiC MOSFET1legg
27 May 25 i    `* Re: LTSpice model for a SiC MOSFET9john larkin
27 May 25 i     `* Re: LTSpice model for a SiC MOSFET8Bill Sloman
27 May 25 i      `* Re: LTSpice model for a SiC MOSFET7Liz Tuddenham
19 May 25 +* Re: LTSpice model for a SiC MOSFET4Edward Rawde
27 May 25 `* Re: LTSpice model for a SiC MOSFET14Joe Gwinn

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