Re: LTSpice model for a SiC MOSFET

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Sujet : Re: LTSpice model for a SiC MOSFET
De : liz (at) *nospam* poppyrecords.invalid.invalid (Liz Tuddenham)
Groupes : sci.electronics.design
Date : 21. May 2025, 12:05:28
Autres entêtes
Organisation : Poppy Records
Message-ID : <1rcomt2.1cqqpmb6ny5diN%liz@poppyrecords.invalid.invalid>
References : 1 2 3 4 5
User-Agent : MacSOUP/2.4.6
Bill Sloman <bill.sloman@ieee.org> wrote:

On 20/05/2025 7:58 pm, Liz Tuddenham wrote:
Bill Sloman <bill.sloman@ieee.org> wrote:
 
[...]
Capacitive divider using a spare core in the
mains supply lead as one plate of the capacitor?  (Depending on supply
frequency and required output current.)
>
I can't see how that could work.
 
If you used a three-core mains lead with one of the cores connected to
Neutral at the plug, one to Live at the plug and one floating, the
floating lead would take up a potential somewhere between the other two,
the stray capacitances between the leads acting as a capacitive divider.
 
The Live and Neutral leads are left unconnected at the equipment end and
the floating lead is connected to a rectifier system which takes it's
earth reference from the equipment being supplied.  It would be
approximately a constant-current supply, so a capacitor and zener diode
would be sufficient to stabilise it at the required low voltage.
 
The mains lead is acting as a high voltage capacitor but is a lot
cheaper and more reliable.
 
If you need a solid earth on the output, use a four-core cable.
 
That's a lot of words but doesn't describe anything that takes a small
direct current at high voltage and turns it into larger current at a low
voltage.

The original post didn't say that it was a direct current source.  My
comment "Depending on supply frequency and required output current."
would have given you a clue that I was assuming an A.C. source.

--
~ Liz Tuddenham ~
(Remove the ".invalid"s and add ".co.uk" to reply)
www.poppyrecords.co.uk

Date Sujet#  Auteur
18 May 25 * LTSpice model for a SiC MOSFET125Bill Sloman
18 May 25 +* Re: LTSpice model for a SiC MOSFET62john larkin
19 May 25 i`* Re: LTSpice model for a SiC MOSFET61Bill Sloman
19 May 25 i +* Re: LTSpice model for a SiC MOSFET34john larkin
19 May 25 i i`* Re: LTSpice model for a SiC MOSFET33Bill Sloman
19 May 25 i i +* Re: LTSpice model for a SiC MOSFET16john larkin
19 May 25 i i i`* Re: LTSpice model for a SiC MOSFET15Bill Sloman
19 May 25 i i i `* Re: LTSpice model for a SiC MOSFET14Edward Rawde
19 May 25 i i i  +* Re: LTSpice model for a SiC MOSFET2john larkin
20 May 25 i i i  i`- Re: LTSpice model for a SiC MOSFET1Bill Sloman
20 May 25 i i i  `* Re: LTSpice model for a SiC MOSFET11Bill Sloman
20 May 25 i i i   `* Re: LTSpice model for a SiC MOSFET10Mike Perkins
20 May 25 i i i    `* Re: LTSpice model for a SiC MOSFET9Bill Sloman
20 May 25 i i i     `* Re: LTSpice model for a SiC MOSFET [OT]8Liz Tuddenham
21 May 25 i i i      `* Re: LTSpice model for a SiC MOSFET [OT]7legg
21 May 25 i i i       +* Re: LTSpice model for a SiC MOSFET [OT]5Liz Tuddenham
21 May 25 i i i       i`* Re: LTSpice model for a SiC MOSFET [OT]4john larkin
21 May 25 i i i       i +* Re: LTSpice model for a SiC MOSFET [OT]2Phil Hobbs
21 May 25 i i i       i i`- Re: LTSpice model for a SiC MOSFET [OT]1Bill Sloman
21 May 25 i i i       i `- Re: LTSpice model for a SiC MOSFET [OT]1Liz Tuddenham
21 May 25 i i i       `- Re: LTSpice model for a SiC MOSFET [OT]1Bill Sloman
19 May 25 i i `* Re: LTSpice model for a SiC MOSFET16Edward Rawde
19 May 25 i i  +* Re: LTSpice model for a SiC MOSFET2john larkin
20 May 25 i i  i`- Re: LTSpice model for a SiC MOSFET1Bill Sloman
20 May 25 i i  `* Re: LTSpice model for a SiC MOSFET13Bill Sloman
20 May 25 i i   `* Re: LTSpice model for a SiC MOSFET12Edward Rawde
20 May 25 i i    +- Re: LTSpice model for a SiC MOSFET1john larkin
20 May 25 i i    +- Re: LTSpice model for a SiC MOSFET1John R Walliker
20 May 25 i i    `* Re: LTSpice model for a SiC MOSFET9Bill Sloman
20 May 25 i i     `* Re: LTSpice model for a SiC MOSFET8Edward Rawde
21 May 25 i i      `* Re: LTSpice model for a SiC MOSFET7Bill Sloman
21 May 25 i i       `* Re: LTSpice model for a SiC MOSFET6Edward Rawde
21 May 25 i i        +- Re: LTSpice model for a SiC MOSFET1Bill Sloman
21 May 25 i i        `* Re: LTSpice model for a SiC MOSFET4john larkin
21 May 25 i i         +* Re: LTSpice model for a SiC MOSFET2Edward Rawde
21 May 25 i i         i`- Re: LTSpice model for a SiC MOSFET1Bill Sloman
21 May 25 i i         `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
19 May 25 i +* Re: LTSpice model for a SiC MOSFET20legg
19 May 25 i i+* Re: LTSpice model for a SiC MOSFET11Bill Sloman
19 May 25 i ii`* Re: LTSpice model for a SiC MOSFET10legg
20 May 25 i ii `* Re: LTSpice model for a SiC MOSFET9Bill Sloman
20 May 25 i ii  `* Re: LTSpice model for a SiC MOSFET8legg
20 May 25 i ii   +* Re: LTSpice model for a SiC MOSFET4john larkin
20 May 25 i ii   i`* Re: LTSpice model for a SiC MOSFET3Bill Sloman
21 May 25 i ii   i `* Re: LTSpice model for a SiC MOSFET2john larkin
21 May 25 i ii   i  `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
20 May 25 i ii   `* Re: LTSpice model for a SiC MOSFET3Bill Sloman
21 May 25 i ii    `* Re: LTSpice model for a SiC MOSFET2legg
21 May 25 i ii     `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
20 May 25 i i`* Re: LTSpice model for a SiC MOSFET8john larkin
20 May 25 i i `* Re: LTSpice model for a SiC MOSFET7Bill Sloman
26 May 25 i i  `* Re: LTSpice model for a SiC MOSFET6Cursitor Doom
26 May 25 i i   +* Re: LTSpice model for a SiC MOSFET2john larkin
26 May 25 i i   i`- Re: LTSpice model for a SiC MOSFET1Bill Sloman
26 May 25 i i   `* Re: LTSpice model for a SiC MOSFET3Bill Sloman
26 May 25 i i    `* Re: LTSpice model for a SiC MOSFET2Cursitor Doom
27 May 25 i i     `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
25 May 25 i `* Re: LTSpice model for a SiC MOSFET6JM
26 May 25 i  `* Re: LTSpice model for a SiC MOSFET5Bill Sloman
26 May 25 i   `* Re: LTSpice model for a SiC MOSFET4JM
26 May 25 i    `* Re: LTSpice model for a SiC MOSFET3Bill Sloman
27 May 25 i     `* Re: LTSpice model for a SiC MOSFET2JM
28 May 25 i      `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
18 May 25 +- Re: LTSpice model for a SiC MOSFET1legg
18 May 25 +* Re: LTSpice model for a SiC MOSFET6legg
19 May 25 i`* Re: LTSpice model for a SiC MOSFET5Bill Sloman
19 May 25 i `* Re: LTSpice model for a SiC MOSFET4legg
19 May 25 i  `* Re: LTSpice model for a SiC MOSFET3Bill Sloman
19 May 25 i   `* Re: LTSpice model for a SiC MOSFET2legg
20 May 25 i    `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
19 May 25 +* Re: LTSpice model for a SiC MOSFET37Liz Tuddenham
19 May 25 i+* Re: LTSpice model for a SiC MOSFET7john larkin
22 May 25 ii`* Re: LTSpice model for a SiC MOSFET6Liz Tuddenham
22 May 25 ii `* Re: LTSpice model for a SiC MOSFET5john larkin
22 May 25 ii  `* Re: LTSpice model for a SiC MOSFET4Liz Tuddenham
22 May 25 ii   `* Re: LTSpice model for a SiC MOSFET3john larkin
23 May 25 ii    `* Re: LTSpice model for a SiC MOSFET2Liz Tuddenham
23 May 25 ii     `- Re: LTSpice model for a SiC MOSFET1john larkin
20 May 25 i`* Re: LTSpice model for a SiC MOSFET29Bill Sloman
20 May 25 i +* Re: LTSpice model for a SiC MOSFET8Liz Tuddenham
20 May 25 i i`* Re: LTSpice model for a SiC MOSFET7Bill Sloman
21 May 25 i i `* Re: LTSpice model for a SiC MOSFET6Liz Tuddenham
21 May 25 i i  +* Re: LTSpice model for a SiC MOSFET3Bill Sloman
21 May 25 i i  i`* Re: LTSpice model for a SiC MOSFET2Liz Tuddenham
21 May 25 i i  i `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
21 May 25 i i  `* Re: LTSpice model for a SiC MOSFET2john larkin
21 May 25 i i   `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
20 May 25 i `* Re: LTSpice model for a SiC MOSFET20KevinJ93
21 May 25 i  `* Re: LTSpice model for a SiC MOSFET19Bill Sloman
22 May 25 i   `* Re: LTSpice model for a SiC MOSFET18KevinJ93
22 May 25 i    +* Re: LTSpice model for a SiC MOSFET8Bill Sloman
22 May 25 i    i`* Re: LTSpice model for a SiC MOSFET7piglet
22 May 25 i    i +* Re: LTSpice model for a SiC MOSFET3Bill Sloman
22 May 25 i    i i`* Re: LTSpice model for a SiC MOSFET2piglet
23 May 25 i    i i `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
22 May 25 i    i +* Re: LTSpice model for a SiC MOSFET2john larkin
22 May 25 i    i i`- Re: LTSpice model for a SiC MOSFET1Bill Sloman
23 May 25 i    i `- Re: LTSpice model for a SiC MOSFET1legg
27 May 25 i    `* Re: LTSpice model for a SiC MOSFET9john larkin
27 May 25 i     `* Re: LTSpice model for a SiC MOSFET8Bill Sloman
27 May 25 i      `* Re: LTSpice model for a SiC MOSFET7Liz Tuddenham
19 May 25 +* Re: LTSpice model for a SiC MOSFET4Edward Rawde
27 May 25 `* Re: LTSpice model for a SiC MOSFET14Joe Gwinn

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