Re: LTSpice model for a SiC MOSFET

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Sujet : Re: LTSpice model for a SiC MOSFET
De : bill.sloman (at) *nospam* ieee.org (Bill Sloman)
Groupes : sci.electronics.design
Date : 21. May 2025, 16:41:35
Autres entêtes
Organisation : A noiseless patient Spider
Message-ID : <100ks7l$2su4v$2@dont-email.me>
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On 21/05/2025 10:11 pm, legg wrote:
On Wed, 21 May 2025 03:05:26 +1000, Bill Sloman <bill.sloman@ieee.org>
wrote:
 
On 21/05/2025 12:53 am, legg wrote:
On Tue, 20 May 2025 17:49:54 +1000, Bill Sloman <bill.sloman@ieee.org>
wrote:
>
On 20/05/2025 5:48 am, legg wrote:
On Tue, 20 May 2025 03:21:37 +1000, Bill Sloman <bill.sloman@ieee.org>
wrote:
>
On 19/05/2025 11:33 pm, legg wrote:
On Mon, 19 May 2025 12:23:54 +1000, Bill Sloman <bill.sloman@ieee.org>
wrote:
>
On 19/05/2025 12:15 am, john larkin wrote:
On Sun, 18 May 2025 18:11:58 +1000, Bill Sloman <bill.sloman@ieee.org>
wrote:
>
I'm looking at a problem where somebody wants to step down a 1kV low
current source to 3.3V.
>
The Baxandall class-D oscillator could do it, but it needs a pair 1.7kV
MOSFETs for the job. The Infineon SiC IMH170R450M1 would do it - though
it's a much higher current part (10A) than the job needs (about 1mA).
>
I've dived into the Infineon rabbit-hole which promises LTSpice models,
but wasn't able to find one.
>
Does anybody know of a similar - ideally cheaper and smaller - part for
which there is an LTSpice model?
>
I use a Cree/Wolfspeed 1200v part, C2M0280120D, in my Pockels Cell
driver.
>
https://www.dropbox.com/scl/fi/5arhyamrp0bl3tgb2fasn/DSC02771.JPG?rlkey=3ttcc2yt6s9nrtdouuv3aneol&raw=1
>
They do have an LT Spice model library that works.
>
Gate drive for SiC parts is a bear. I did it myself, but I think there
are chips for that now.
>
There are multi-kilovolt silicon mosfets too.
>
Baxandal looks to be inefficient and expensive as a low power
converter. The drain swing is 2x the supply voltage, and it needs two
fets and a difficult custom transformer.
>
It isn't going to be inefficient. That configuration is famous efficient.
>
The drain swing is actually 1.67 times the supply voltage, but it does
need two switching devices and a specially wound transformer (and we
know how reluctant you are to design them or get them made).
>
It is probably going to be too expensive for the application, and we'd
be grateful for your insights into a cheaper alternative. I can't think
of one.
>
I'd keep it simple and repurpose a backwards commodity CCFL ($0.50)
     transformer, in a low frequency (20-50KHz) buck regulator 'of sorts'.
>
Cold cathode fluorescent lamps are cranky beasts, and Jim Williams
exploited the Baxandal configuration to get the voltages they need out
of low voltage supplies, using bipolar transistor switches. I would not
be all that optimistic about finding a CCFL transformer that I could
repurpose.
>
Designing a transformer for the job isn't all that difficult and finding
a local transformer shop to wind it wasn't all that hard when I did
something similar in the Netherlands  some twenty years ago.
>
A 1KV mosfet (why SIC?) would act as it's own TVS if the source was
really self-limited. 2$
>
The SIC part costs about $5.00. The guy I'm talking to came up with $200
regular silicon part with a higher on resistance and about ten times the
internal capacitances. I'm not recommending SiC on principle - the
limited search I did came up with a SiC part which looked as if might
work, even if still too expensive to be attractive.
>
<snipped badly formatted list>
>
The highest voltage part in there was good for 1.5kV, so not good enough.
>
Bill,  the Baxandal cct is great in lower voltage input applications,
but the one thing you don't want to do with HV sources is ADD voltage
stress.
>
The usual Baxandall circuit does generate a peak voltage that's 1.67
times the supply voltage. Non-resonant switchers tend to generate
switching spikes that go even higher.
>
Hence recommendation for buck-type topologies.
>
I've played with them at the design stage from time to time. I've never
been all that happy with what they've offered.
>
If the Baxandal could be reconfigured as a half-bridge, it might fly
here.
>
Here is Baxandall's original paper - I put a copy on my website more
than ten years ago.
>
http://www.sophia-electronica.com/Baxandall1959JM.pdf
>
It includes a number of possible configurations.
>
Ran across similar circuits, used to power CCFL lamps on canal boats
and caravans in the UK, off 6V and 12V accumulators.
 From my web-site, on the Baxandall resonant inverter.
"The circuit is probably best known from Jim Williams’ series of application notes for Linear Technology, on high frequency inverters for driving cold cathode back-lights used in laptop computers (application notes AN45, AN49, AN51, AN55, AN61, AN65). Jim Williams describes the inverter as a current driven Royer inverter, referring back to the non-resonant inverter described by Bright, Pittman and George H. Royer in  1954 in a paper “Transistors as on-off switches in saturable core circuits” in Electrical Manufacturing. AN65 does include a reference to Peter Baxandall, but to his 1960 paper “Transistor Sine-Wave LC Oscillators” in the British Journal of the IEEE paper number 2978E which is cited in a discussion of root-mean-square power measurements.

In NA, they tended to go straight for a 120VAC inverter buss and COTS
hardware.
Not in lap-top computers.
The Baxandall circuit was tolerably well known in the UK, where Peter Baxandall was almost famous. I've heard a story about Jim Williams getting Linear Technology reps to ask about such circuits, which might explain how he got hold of the circuit without knowing where it came from. Baxandalls paper was published in the UK in a publication that Americans didn't read.
--
Bill Sloman, Sydney

Date Sujet#  Auteur
18 May 25 * LTSpice model for a SiC MOSFET125Bill Sloman
18 May 25 +* Re: LTSpice model for a SiC MOSFET62john larkin
19 May 25 i`* Re: LTSpice model for a SiC MOSFET61Bill Sloman
19 May 25 i +* Re: LTSpice model for a SiC MOSFET34john larkin
19 May 25 i i`* Re: LTSpice model for a SiC MOSFET33Bill Sloman
19 May 25 i i +* Re: LTSpice model for a SiC MOSFET16john larkin
19 May 25 i i i`* Re: LTSpice model for a SiC MOSFET15Bill Sloman
19 May 25 i i i `* Re: LTSpice model for a SiC MOSFET14Edward Rawde
19 May 25 i i i  +* Re: LTSpice model for a SiC MOSFET2john larkin
20 May 25 i i i  i`- Re: LTSpice model for a SiC MOSFET1Bill Sloman
20 May 25 i i i  `* Re: LTSpice model for a SiC MOSFET11Bill Sloman
20 May 25 i i i   `* Re: LTSpice model for a SiC MOSFET10Mike Perkins
20 May 25 i i i    `* Re: LTSpice model for a SiC MOSFET9Bill Sloman
20 May 25 i i i     `* Re: LTSpice model for a SiC MOSFET [OT]8Liz Tuddenham
21 May 25 i i i      `* Re: LTSpice model for a SiC MOSFET [OT]7legg
21 May 25 i i i       +* Re: LTSpice model for a SiC MOSFET [OT]5Liz Tuddenham
21 May 25 i i i       i`* Re: LTSpice model for a SiC MOSFET [OT]4john larkin
21 May 25 i i i       i +* Re: LTSpice model for a SiC MOSFET [OT]2Phil Hobbs
21 May 25 i i i       i i`- Re: LTSpice model for a SiC MOSFET [OT]1Bill Sloman
21 May 25 i i i       i `- Re: LTSpice model for a SiC MOSFET [OT]1Liz Tuddenham
21 May 25 i i i       `- Re: LTSpice model for a SiC MOSFET [OT]1Bill Sloman
19 May 25 i i `* Re: LTSpice model for a SiC MOSFET16Edward Rawde
19 May 25 i i  +* Re: LTSpice model for a SiC MOSFET2john larkin
20 May 25 i i  i`- Re: LTSpice model for a SiC MOSFET1Bill Sloman
20 May 25 i i  `* Re: LTSpice model for a SiC MOSFET13Bill Sloman
20 May 25 i i   `* Re: LTSpice model for a SiC MOSFET12Edward Rawde
20 May 25 i i    +- Re: LTSpice model for a SiC MOSFET1john larkin
20 May 25 i i    +- Re: LTSpice model for a SiC MOSFET1John R Walliker
20 May 25 i i    `* Re: LTSpice model for a SiC MOSFET9Bill Sloman
20 May 25 i i     `* Re: LTSpice model for a SiC MOSFET8Edward Rawde
21 May 25 i i      `* Re: LTSpice model for a SiC MOSFET7Bill Sloman
21 May 25 i i       `* Re: LTSpice model for a SiC MOSFET6Edward Rawde
21 May 25 i i        +- Re: LTSpice model for a SiC MOSFET1Bill Sloman
21 May 25 i i        `* Re: LTSpice model for a SiC MOSFET4john larkin
21 May 25 i i         +* Re: LTSpice model for a SiC MOSFET2Edward Rawde
21 May 25 i i         i`- Re: LTSpice model for a SiC MOSFET1Bill Sloman
21 May 25 i i         `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
19 May 25 i +* Re: LTSpice model for a SiC MOSFET20legg
19 May 25 i i+* Re: LTSpice model for a SiC MOSFET11Bill Sloman
19 May 25 i ii`* Re: LTSpice model for a SiC MOSFET10legg
20 May 25 i ii `* Re: LTSpice model for a SiC MOSFET9Bill Sloman
20 May 25 i ii  `* Re: LTSpice model for a SiC MOSFET8legg
20 May 25 i ii   +* Re: LTSpice model for a SiC MOSFET4john larkin
20 May 25 i ii   i`* Re: LTSpice model for a SiC MOSFET3Bill Sloman
21 May 25 i ii   i `* Re: LTSpice model for a SiC MOSFET2john larkin
21 May 25 i ii   i  `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
20 May 25 i ii   `* Re: LTSpice model for a SiC MOSFET3Bill Sloman
21 May 25 i ii    `* Re: LTSpice model for a SiC MOSFET2legg
21 May 25 i ii     `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
20 May 25 i i`* Re: LTSpice model for a SiC MOSFET8john larkin
20 May 25 i i `* Re: LTSpice model for a SiC MOSFET7Bill Sloman
26 May 25 i i  `* Re: LTSpice model for a SiC MOSFET6Cursitor Doom
26 May 25 i i   +* Re: LTSpice model for a SiC MOSFET2john larkin
26 May 25 i i   i`- Re: LTSpice model for a SiC MOSFET1Bill Sloman
26 May 25 i i   `* Re: LTSpice model for a SiC MOSFET3Bill Sloman
26 May 25 i i    `* Re: LTSpice model for a SiC MOSFET2Cursitor Doom
27 May 25 i i     `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
25 May 25 i `* Re: LTSpice model for a SiC MOSFET6JM
26 May 25 i  `* Re: LTSpice model for a SiC MOSFET5Bill Sloman
26 May 25 i   `* Re: LTSpice model for a SiC MOSFET4JM
26 May 25 i    `* Re: LTSpice model for a SiC MOSFET3Bill Sloman
27 May 25 i     `* Re: LTSpice model for a SiC MOSFET2JM
28 May 25 i      `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
18 May 25 +- Re: LTSpice model for a SiC MOSFET1legg
18 May 25 +* Re: LTSpice model for a SiC MOSFET6legg
19 May 25 i`* Re: LTSpice model for a SiC MOSFET5Bill Sloman
19 May 25 i `* Re: LTSpice model for a SiC MOSFET4legg
19 May 25 i  `* Re: LTSpice model for a SiC MOSFET3Bill Sloman
19 May 25 i   `* Re: LTSpice model for a SiC MOSFET2legg
20 May 25 i    `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
19 May 25 +* Re: LTSpice model for a SiC MOSFET37Liz Tuddenham
19 May 25 i+* Re: LTSpice model for a SiC MOSFET7john larkin
22 May 25 ii`* Re: LTSpice model for a SiC MOSFET6Liz Tuddenham
22 May 25 ii `* Re: LTSpice model for a SiC MOSFET5john larkin
22 May 25 ii  `* Re: LTSpice model for a SiC MOSFET4Liz Tuddenham
22 May 25 ii   `* Re: LTSpice model for a SiC MOSFET3john larkin
23 May 25 ii    `* Re: LTSpice model for a SiC MOSFET2Liz Tuddenham
23 May 25 ii     `- Re: LTSpice model for a SiC MOSFET1john larkin
20 May 25 i`* Re: LTSpice model for a SiC MOSFET29Bill Sloman
20 May 25 i +* Re: LTSpice model for a SiC MOSFET8Liz Tuddenham
20 May 25 i i`* Re: LTSpice model for a SiC MOSFET7Bill Sloman
21 May 25 i i `* Re: LTSpice model for a SiC MOSFET6Liz Tuddenham
21 May 25 i i  +* Re: LTSpice model for a SiC MOSFET3Bill Sloman
21 May 25 i i  i`* Re: LTSpice model for a SiC MOSFET2Liz Tuddenham
21 May 25 i i  i `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
21 May 25 i i  `* Re: LTSpice model for a SiC MOSFET2john larkin
21 May 25 i i   `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
20 May 25 i `* Re: LTSpice model for a SiC MOSFET20KevinJ93
21 May 25 i  `* Re: LTSpice model for a SiC MOSFET19Bill Sloman
22 May 25 i   `* Re: LTSpice model for a SiC MOSFET18KevinJ93
22 May 25 i    +* Re: LTSpice model for a SiC MOSFET8Bill Sloman
22 May 25 i    i`* Re: LTSpice model for a SiC MOSFET7piglet
22 May 25 i    i +* Re: LTSpice model for a SiC MOSFET3Bill Sloman
22 May 25 i    i i`* Re: LTSpice model for a SiC MOSFET2piglet
23 May 25 i    i i `- Re: LTSpice model for a SiC MOSFET1Bill Sloman
22 May 25 i    i +* Re: LTSpice model for a SiC MOSFET2john larkin
22 May 25 i    i i`- Re: LTSpice model for a SiC MOSFET1Bill Sloman
23 May 25 i    i `- Re: LTSpice model for a SiC MOSFET1legg
27 May 25 i    `* Re: LTSpice model for a SiC MOSFET9john larkin
27 May 25 i     `* Re: LTSpice model for a SiC MOSFET8Bill Sloman
27 May 25 i      `* Re: LTSpice model for a SiC MOSFET7Liz Tuddenham
19 May 25 +* Re: LTSpice model for a SiC MOSFET4Edward Rawde
27 May 25 `* Re: LTSpice model for a SiC MOSFET14Joe Gwinn

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