Re: reset circuit

On Mon, 9 Jun 2025 07:07:23 -0700, John Robertson <jrr@flippers.com>
wrote:

On 2025-06-07 1:46 p.m., john larkin wrote:

On Sat, 7 Jun 2025 12:29:06 -0700, John Robertson <jrr@flippers.com>
wrote:
 

On 2025-06-07 9:41 a.m., john larkin wrote:

We have a box that has to never make any false outputs. Bad things
could happen.
>
Part of the fix is to have a solid powerup reset signal, to handle
power brownouts or such. This looks OK:
>
https://www.dropbox.com/scl/fi/cejyyhcrdph1bewn8a6nx/P800_Reset_1.jpg?rlkey=leky75poeerbojmd3xjat4z54&raw=1
>
The 12 and 5v rails will have a bunch of downstream bypass caps. The
dump resistors will discharge them.
>

>
Did you allow for the voltage drop across the transistor in your Reset
Supervisor selection?
>
Just asking...
>
John :-#)#

 
Sure. In normal operation it's inverted-state saturated, so the MAX
part sees all the +5.
 
If the +12 dips to about +10, the transistor base is +5, and the
emitter is 4.4, and the MAX says reset.
 
That transistor has an insane beta and a pretty hunky inverted beta.
 

>
A saturation voltage drop of maximum 0.25V CE for the BCX70, BE
saturation is max. 0.85V...
>
https://www.infineon.com/dgdl/bcw60_bcx70.pdf
>
John :-#)#

Assume a lightly loaded emitter follower with +5 on the collector.
Drive the base from some variable supply Vb. Ramp Vb up from zero.

Initially, the emitter will track Vb with about 0.6 volts drop.

It gets interesting when Vb exceeds +5. The emitter keeps following
the base until the B-C junction forward biases, around +5.6. Then the
transistor saturates in inverse mode. As you tease Vb, the C-E
saturation voltage can be made exactly zero, or you can make the
emitter go above +5 with a little more base drive. Backwards
saturation.

I made a bunch of 16-bit DACS that way once, all discrete parts.

The Fairchild BCX70 has beta about 500 and inverse beta about 16, both
measured at 2 mA. I like that part, but AoE rates it dead worst for
Rbb at 760 ohms. Hurt my feelings.