Re: Why I've Dropped In

On 6/17/2025 1:43 PM, Stefan Monnier wrote:

MitchAlsup1 [2025-06-17 17:45:23] wrote:

On Tue, 17 Jun 2025 1:26:01 +0000, Stephen Fuld wrote:

On 6/16/2025 9:17 AM, Stefan Monnier wrote:

I vaguely remember reading somewhere that it doesn't have to be too bad:
e.g. if you reduce register-specifiers to just 4bits for a 32-register
architecture and kind of "randomize" which of the 16 values refer to
which of the 32 registers for each instruction, it's fairly easy to
adjust a register allocator to handle this correctly (assuming you
choose your instructions beforehand, you simply mark, for each
instructions, the unusable registers as "interfering"), and the end
result is often almost as good as if you had 5bits to specify
the registers.

I can see that it isn't too hard on the logic for the register
allocator,

You are missing the BIG problem::
>
Register allocator allocated Rk for calculation j and later allocates
Rm for instruction p, then a few instructions later the code generator
notices that Rk and RM need to be paired or shared and they were not
originally.

 What do you mean by "a few instructions later"?  The above was stated in
the context of a register allocator based on something like Chaitin's
algorithm, which does not proceed "instruction by instruction" but

[...]
Fwiw, here is some old code of mine, a region allocator in C that should still work today... Sorry for butting in:
(wow way back in 2009, shit...)
https://groups.google.com/g/comp.lang.c/c/7oaJFWKVCTw/m/sSWYU9BUS_QJ
https://groups.google.com/g/comp.lang.c/c/H_p2Ki5JhYU/m/rlSzqJsxCQAJ
The link still works. cool:
https://pastebin.com/raw/f37a23918