Re: Split instruction and immediate stream

On Sun, 9 Mar 2025 21:02:44 +0000, EricP wrote:

Robert Finch wrote:

On 2025-03-08 9:21 a.m., Thomas Koenig wrote:

There was a recent post to the gcc mailing list which showed
interesting concept of dealing with large constants in an ISA:
Splitting a the instruction and constant stream.  It can be found
at https://github.com/michaeljclark/glyph/ , and is named "glyph".
>
I think the problem the author is trying to solve is better addressed by
My 66000 (and I would absolutely _hate_ to write an assembler for it).
Still, I thought it worth mentioning.

>
I think it is better to use a constant prefix / postfix instruction to
encode larger constants in the instruction stream. Or use a wider
instruction format. In Q+ constant postfixes can be used to override a
register spec, allowing immediate constants to be used with many more
instructions.

>
Yes a kind of prefix instruction that say "here comes an immediate
value"
and loads a 2, 4, or 8 byte immediate with all the sign or zero extend
options into a special constant register in the Decoder and marks it
valid.
The next instruction just says add immediate "ADDI rd, rs" and it
implies
the constant it just stashed.
>
That relieves the consumer opcodes from having to encode all the
different variable immediate formats.
>
It could easily extend to multiple immediate prefix instructions so
one can have instructions like store immediate STD [rd+imm1], imm2
by just adding a second constant register to the Decoder.
>
The only complication I can see is if the instruction producer-consumer
pair straddle pages and their is a page fault on the second.
I wouldn't want to have to save the stashed constant as "thread context"
so it should roll back to the start of the immediate instruction.

Execute the instruction and the (preceding) constant as a single
instruction, so any fault leaves IP pointing at the constant.

In which case the faulting RIP is the first instruction and the
faulting address is someplace in the second.