Sujet : Re: number of registers
De : already5chosen (at) *nospam* yahoo.com (Michael S)
Groupes : comp.archDate : 21. Aug 2024, 15:42:33
Autres entêtes
Organisation : A noiseless patient Spider
Message-ID : <20240821164233.00001627@yahoo.com>
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On Wed, 21 Aug 2024 12:00:47 GMT
anton@mips.complang.tuwien.ac.at (Anton Ertl) wrote:
On the Intel side, LD-OP-ST is split into three uops according to
everything I have read. Apparently they are satisfied with this
approach, or they would have gone for something else.
- anton
AFAIK, on the Intel side, LD-OP-ST is decoded into 4 uOps that are
immediately fused into 2 fused uOps. They travel through rename phase
as 2 uOps. I am not sure if they are split back into 4 uOps before or
after OoO schedulers, but would guess the former.