Sujet : Re: 80286 protected mode
De : already5chosen (at) *nospam* yahoo.com (Michael S)
Groupes : comp.archDate : 13. Oct 2024, 10:26:22
Autres entêtes
Organisation : A noiseless patient Spider
Message-ID : <20241013122622.000037d5@yahoo.com>
References : 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
User-Agent : Claws Mail 3.19.1 (GTK+ 2.24.33; x86_64-w64-mingw32)
On Sun, 13 Oct 2024 10:31:49 +0300
Niklas Holsti <
niklas.holsti@tidorum.invalid> wrote:
On 2024-10-12 21:33, Brett wrote:
David Brown <david.brown@hesbynett.no> wrote:
On 12/10/2024 01:32, MitchAlsup1 wrote:
On Fri, 11 Oct 2024 22:02:32 +0000, David Brown wrote:
On 11/10/2024 20:55, MitchAlsup1 wrote:
On Fri, 11 Oct 2024 12:10:13 +0000, David Brown wrote:
>
Do you think you can just write this :
>
void * memmove(void * s1, const void * s2, size_t n)
{
return memmove(s1, s2, n);
}
>
in your library's source?
>
.global memmove
memmove:
MM R2,R1,R3
RET
>
sure !
>
You are either totally clueless, or you are trolling. And I
know you are not clueless.
>
This discussion has become pointless.
>
The point is that there are a few things that may be hard to do
with {decode, pipeline, calculations, specifications...}; but
because they are so universally needed; these, too, should
"get into ISA".
>
One good reason to put them in ISA is to preserve the programmers
efforts over decades, so they don't have to re-write libc every-
time a new set of instructions come out.
>
Moving an arbitrary amount of memory from point a to point b
happens to fall into that universal need. Setting an arbitrary
amount of memory to a value also falls into that universal
need.
>
Again, I have to ask - do you bother to read the posts you reply
to? Are you interested in replying, and engaging in the
discussion? Or are you just looking for a chance to promote your
own architecture, no matter how tenuous the connection might be to
other posts?
>
Again, let me say that I agree with what you are saying - I agree
that an ISA should have instructions that are efficient for what
people actually want to do. I agree that it is a good thing to
have instructions that let performance scale with advances in
hardware ideally without needing changes in compiled binaries, and
at least without needing changes in source code.
>
I believe there is an interesting discussion to be had here, and I
would enjoy hearing about comparisons of different ways things
functions like memcpy() and memset() can be implemented in
different architectures and optimised for different sizes, or how
scalable vector instructions can work in comparison to fixed-size
SIMD instructions.
>
But at the moment, this potential is lost because you are posting
total shite about implementing memmove() in standard C. It is
disappointing that someone with your extensive knowledge and
experience cannot see this. I am finding it all very frustrating.
[ snip discussion of HW ]
In short your complaints are wrong headed in not understanding what
hardware memcpy can do.
I think your reply proves David's complaint: you did not read, or did
not understand, what David is frustrated about. The true fact that
David is defending is that memmove() cannot be implemented
"efficiently" in /standard/ C source code, on /any/ HW, because it
would require comparing /C pointers/ that point to potentially
different /C objects/, which is not defined behavior in standard C,
whether compiled to machine code, or executed by an interpreter of C
code, or executed by a human programmer performing what was called
"desk testing" in the 1960s.
Obviously memmove() can be implemented efficently in non-standard C
where such pointers can be compared, or by sequences of ordinary ALU
instructions, or by dedicated instructions such as Mitch's MM, and
David is not disputing that. But Mitch seems not to understand or not
to see the issue about standard C vs memmove().
Sufficiently advanced compiler can recognize patterns and replace them
with built-in sequences.
In case of memmove() the most easily recognizable pattern in 100%
standard C99 appears to be:
void *memmove( void *dest, const void *src, size_t count)
{
if (count > 0) {
char tmp[count];
memcpy(tmp, src, count);
memcpy(dest, tmp, count);
}
return dest;
}
I don't suggest that real implementation in Brian's compiler is like
that. Much more likely his implementation uses non-standard C and looks
approximately like:
void *memmove(void *dest, const void *src, size_t count {
return __builtin_memmove(dest, src, count);
}
However, implementing the first variant efficiently is well within
abilities of good compiler.
Date | Sujet | # | | Auteur |
16 Apr 24 | Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress) | 237 | | Lawrence D'Oliveiro |
16 Apr 24 | Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress) | 236 | | David Brown |
16 Apr 24 | Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress) | 1 | | MitchAlsup1 |
26 May 24 | Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress) | 1 | | MitchAlsup1 |
1 Oct 24 | Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress) | 233 | | MitchAlsup1 |
1 Oct 24 | Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress) | 232 | | Thomas Koenig |
1 Oct 24 | Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress) | 225 | | MitchAlsup1 |
2 Oct 24 | Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress) | 223 | | Brett |
3 Oct 24 | Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress) | 222 | | Lawrence D'Oliveiro |
3 Oct 24 | Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress) | 1 | | Brett |
3 Oct 24 | Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress) | 1 | | Anton Ertl |
3 Oct 24 | Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress) | 219 | | David Brown |
3 Oct 24 | Byte ordering (was: Whether something is RISC or not) | 218 | | Anton Ertl |
3 Oct 24 | Re: Byte ordering (was: Whether something is RISC or not) | 1 | | David Brown |
4 Oct 24 | Re: Byte ordering (was: Whether something is RISC or not) | 215 | | Lawrence D'Oliveiro |
4 Oct 24 | Re: Byte ordering | 1 | | Lynn Wheeler |
4 Oct 24 | Re: Byte ordering (was: Whether something is RISC or not) | 211 | | David Brown |
4 Oct 24 | Re: Byte ordering (was: Whether something is RISC or not) | 210 | | Anton Ertl |
4 Oct 24 | Re: Byte ordering | 5 | | BGB |
5 Oct 24 | Re: Byte ordering | 4 | | MitchAlsup1 |
5 Oct 24 | Re: Byte ordering | 2 | | BGB |
5 Oct 24 | Re: Byte ordering | 1 | | Lawrence D'Oliveiro |
5 Oct 24 | Re: Byte ordering | 1 | | Lawrence D'Oliveiro |
5 Oct 24 | Re: Byte ordering (was: Whether something is RISC or not) | 13 | | Lawrence D'Oliveiro |
5 Oct 24 | Re: Byte ordering (was: Whether something is RISC or not) | 12 | | Brett |
5 Oct 24 | Re: Byte ordering (was: Whether something is RISC or not) | 11 | | Anton Ertl |
5 Oct 24 | Re: Byte ordering (was: Whether something is RISC or not) | 10 | | Michael S |
6 Oct 24 | Re: Byte ordering | 1 | | Terje Mathisen |
6 Oct 24 | Re: Byte ordering (was: Whether something is RISC or not) | 8 | | Brett |
7 Oct 24 | Re: Byte ordering (was: Whether something is RISC or not) | 7 | | Lawrence D'Oliveiro |
7 Oct 24 | Re: Byte ordering (was: Whether something is RISC or not) | 6 | | Brett |
7 Oct 24 | Re: Byte ordering (was: Whether something is RISC or not) | 5 | | Michael S |
7 Oct 24 | Re: Byte ordering | 2 | | Stefan Monnier |
7 Oct 24 | Re: Byte ordering | 1 | | Michael S |
7 Oct 24 | Re: Byte ordering (was: Whether something is RISC or not) | 2 | | Lawrence D'Oliveiro |
8 Oct 24 | Re: Byte ordering | 1 | | Terje Mathisen |
6 Oct 24 | Re: Byte ordering | 191 | | David Brown |
6 Oct 24 | Re: Byte ordering | 190 | | Anton Ertl |
6 Oct 24 | Re: Byte ordering | 189 | | John Dallman |
7 Oct 24 | Re: Byte ordering | 20 | | Lawrence D'Oliveiro |
8 Oct 24 | Re: Byte ordering | 19 | | John Dallman |
9 Oct 24 | VMS/NT memory management (was: Byte ordering) | 1 | | Stefan Monnier |
15 Oct 24 | Re: Byte ordering | 2 | | Lawrence D'Oliveiro |
15 Oct 24 | Re: Byte ordering | 1 | | MitchAlsup1 |
15 Oct 24 | Re: Byte ordering | 15 | | Lawrence D'Oliveiro |
15 Oct 24 | Re: Byte ordering | 3 | | Michael S |
15 Oct 24 | Re: Byte ordering | 1 | | John Dallman |
18 Oct 24 | Re: Byte ordering | 1 | | Lawrence D'Oliveiro |
15 Oct 24 | Re: Byte ordering | 9 | | John Dallman |
16 Oct 24 | Re: Byte ordering | 7 | | George Neuner |
16 Oct 24 | Re: Byte ordering | 6 | | Terje Mathisen |
16 Oct 24 | Re: Byte ordering | 5 | | David Brown |
17 Oct 24 | Re: Byte ordering | 2 | | George Neuner |
17 Oct 24 | Re: Byte ordering | 1 | | David Brown |
17 Oct 24 | Re: clouds, not Byte ordering | 2 | | John Levine |
17 Oct 24 | Re: clouds, not Byte ordering | 1 | | David Brown |
18 Oct 24 | Re: Byte ordering | 1 | | Lawrence D'Oliveiro |
16 Oct 24 | Re: Byte ordering | 2 | | Paul A. Clayton |
18 Oct 24 | Re: Microkernels & Capabilities (was Re: Byte ordering) | 1 | | Lawrence D'Oliveiro |
7 Oct 24 | 80286 protected mode | 168 | | Anton Ertl |
7 Oct 24 | Re: 80286 protected mode | 5 | | Lars Poulsen |
7 Oct 24 | Re: 80286 protected mode | 4 | | Terje Mathisen |
7 Oct 24 | Re: 80286 protected mode | 1 | | Michael S |
7 Oct 24 | Re: 80286 protected mode | 2 | | Lawrence D'Oliveiro |
8 Oct 24 | Re: 80286 protected mode | 1 | | Terje Mathisen |
7 Oct 24 | Re: 80286 protected mode | 3 | | Brett |
7 Oct 24 | Re: 80286 protected mode | 2 | | Michael S |
7 Oct 24 | Re: 80286 protected mode | 1 | | Brett |
7 Oct 24 | Re: 80286 protected mode | 1 | | Lawrence D'Oliveiro |
8 Oct 24 | Re: 80286 protected mode | 152 | | MitchAlsup1 |
8 Oct 24 | Re: 80286 protected mode | 4 | | Lawrence D'Oliveiro |
8 Oct 24 | Re: 80286 protected mode | 3 | | MitchAlsup1 |
9 Oct 24 | Re: 80286 protected mode | 1 | | David Brown |
15 Oct 24 | Re: 80286 protected mode | 1 | | Lawrence D'Oliveiro |
8 Oct 24 | Re: 80286 protected mode | 147 | | Anton Ertl |
8 Oct 24 | Re: 80286 protected mode | 1 | | Robert Finch |
9 Oct 24 | Re: 80286 protected mode | 145 | | David Brown |
9 Oct 24 | Re: 80286 protected mode | 79 | | MitchAlsup1 |
9 Oct 24 | Re: 80286 protected mode | 78 | | David Brown |
9 Oct 24 | Re: 80286 protected mode | 77 | | Stephen Fuld |
10 Oct 24 | Re: 80286 protected mode | 2 | | MitchAlsup1 |
10 Oct 24 | Re: 80286 protected mode | 1 | | David Brown |
10 Oct 24 | Re: 80286 protected mode | 1 | | David Brown |
11 Oct 24 | Re: 80286 protected mode | 73 | | Tim Rentsch |
15 Oct 24 | Re: 80286 protected mode | 72 | | Stefan Monnier |
15 Oct 24 | Re: 80286 protected mode | 30 | | MitchAlsup1 |
16 Oct 24 | Re: 80286 protected mode | 25 | | MitchAlsup1 |
16 Oct 24 | Re: C and turtles, 80286 protected mode | 13 | | John Levine |
16 Oct 24 | Re: C and turtles, 80286 protected mode | 7 | | MitchAlsup1 |
16 Oct 24 | Re: C and turtles, 80286 protected mode | 6 | | John Levine |
17 Oct 24 | Re: C and turtles, 80286 protected mode | 5 | | Thomas Koenig |
20 Oct 24 | Re: C and turtles, 80286 protected mode | 4 | | Lawrence D'Oliveiro |
20 Oct 24 | Re: C and turtles, 80286 protected mode | 3 | | George Neuner |
22 Oct 24 | Re: C and turtles, 80286 protected mode | 2 | | Tim Rentsch |
22 Oct 24 | Re: C and turtles, 80286 protected mode | 1 | | George Neuner |
16 Oct 24 | Re: C and turtles, 80286 protected mode | 1 | | David Brown |
16 Oct 24 | Re: C and turtles, 80286 protected mode | 4 | | Paul A. Clayton |
17 Oct 24 | Re: C and turtles, 80286 protected mode | 1 | | David Brown |
20 Oct 24 | Re: C and turtles, 80286 protected mode | 2 | | Lawrence D'Oliveiro |
20 Oct 24 | Re: C and turtles, 80286 protected mode | 1 | | Paul A. Clayton |
16 Oct 24 | Re: 80286 protected mode | 7 | | Thomas Koenig |
17 Oct 24 | Re: 80286 protected mode | 3 | | George Neuner |
17 Oct 24 | Re: 80286 protected mode | 1 | | Tim Rentsch |
16 Oct 24 | Re: 80286 protected mode | 3 | | David Brown |
17 Oct 24 | Re: 80286 protected mode | 1 | | Tim Rentsch |
16 Oct 24 | Re: 80286 protected mode | 41 | | David Brown |
9 Oct 24 | Re: 80286 protected mode | 51 | | Thomas Koenig |
13 Oct 24 | Re: 80286 protected mode | 14 | | Anton Ertl |
8 Oct 24 | Re: 80286 protected mode | 6 | | John Levine |
6 Oct 24 | Re: Byte ordering (was: Whether something is RISC or not) | 2 | | Michael S |
4 Oct 24 | Re: Byte ordering (was: Whether something is RISC or not) | 1 | | John Dallman |
2 Oct 24 | Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress) | 1 | | Thomas Koenig |
2 Oct 24 | Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress) | 5 | | David Schultz |
3 Oct 24 | Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress) | 1 | | Lawrence D'Oliveiro |