Re: auto predicating branches

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Sujet : Re: auto predicating branches
De : anton (at) *nospam* mips.complang.tuwien.ac.at (Anton Ertl)
Groupes : comp.arch
Date : 21. Apr 2025, 07:05:32
Autres entêtes
Organisation : Institut fuer Computersprachen, Technische Universitaet Wien
Message-ID : <2025Apr21.080532@mips.complang.tuwien.ac.at>
References : 1 2 3 4 5 6 7 8 9 10 11 12 13 14
User-Agent : xrn 10.11
Robert Finch <robfi680@gmail.com> writes:
Having branches automatically convert into
predicates when they branch forward a short distance <7 instructions.

If-conversion in hardware is a good idea, if done well, because it
involves issues that tend to be unknown to compilers:

* How predictable is the condition?  If the condition is very well
  predictable, if-conversion is not a good idea, because it turns the
  control dependency (which does not cost latency when the prediction
  is correct) into a data dependency.  Moreover, in this case the
  if-conversion increases the resource consumption.  Compilers are not
  good at predicting the predictability AFAIK.

* Is the condition available before or after the original data
  dependencies?  And if afterwards, by how many cycles?  If it is
  afterwards and the branch prediction would be correct, the
  if-conversion means that the result of the instruction is available
  later, which may reduce IPC.  OTOH, if the branch prediction would
  be incorrect, the recovery also depends on when the condition
  becomes available, and the total latency is higher in the case of no
  if-conversion.  The compiler may do an ok job at predicting whether
  a condition is available before or after the original data
  dependencies (I don't know a paper that evaluates that), but without
  knowing about the prediction accuracy of a specific condition that
  does not help much.

So the hardware should take predictability of a condition and the
availability of the condition into consideration for if-conversion.

What about reverse if-conversion in hardware, i.e., converting
predicated instructions and the like (conditional moves, if-then-else
instructions and the instructions they control) into branch-predicted
phantom branches and eliminating the data dependency on the condition
from the instruction.

For performance, one might consider reverse if-conversion, because the
same considerations apply; however, there is also a security aspect:
programmers have used these instructions instead of branches to
produce constant-time code to avoid timing side channels of code that
deals with secrets; and the discovery of Spectre has shown additional
timing side channels of branches.  Because you cannot be sure that the
predicated instruction is there for security reasons, you must not use
reverse if-conversion in hardware.

- anton
--
'Anyone trying for "industrial quality" ISA should avoid undefined behavior.'
  Mitch Alsup, <c17fcd89-f024-40e7-a594-88a85ac10d20o@googlegroups.com>

Date Sujet#  Auteur
4 Oct 24 * Re: Tonights Tradeoff - Background Execution Buffers78Robert Finch
4 Oct 24 +* Re: Tonights Tradeoff - Background Execution Buffers75Anton Ertl
4 Oct 24 i`* Re: Tonights Tradeoff - Background Execution Buffers74Robert Finch
5 Oct 24 i `* Re: Tonights Tradeoff - Background Execution Buffers73Anton Ertl
9 Oct 24 i  `* Re: Tonights Tradeoff - Background Execution Buffers72Robert Finch
9 Oct 24 i   +* Re: Tonights Tradeoff - Background Execution Buffers3MitchAlsup1
9 Oct 24 i   i+- Re: Tonights Tradeoff - Background Execution Buffers1Robert Finch
12 Oct 24 i   i`- Re: Tonights Tradeoff - Background Execution Buffers1BGB
12 Oct 24 i   +* Re: Tonights Tradeoff - Carry and Overflow67Robert Finch
12 Oct 24 i   i`* Re: Tonights Tradeoff - Carry and Overflow66MitchAlsup1
12 Oct 24 i   i `* Re: Tonights Tradeoff - Carry and Overflow65BGB
12 Oct 24 i   i  `* Re: Tonights Tradeoff - Carry and Overflow64Robert Finch
13 Oct 24 i   i   +* Re: Tonights Tradeoff - Carry and Overflow3MitchAlsup1
13 Oct 24 i   i   i`* Re: Tonights Tradeoff - ATOM2Robert Finch
13 Oct 24 i   i   i `- Re: Tonights Tradeoff - ATOM1MitchAlsup1
13 Oct 24 i   i   +- Re: Tonights Tradeoff - Carry and Overflow1BGB
31 Oct 24 i   i   `* Page fetching cache controller59Robert Finch
31 Oct 24 i   i    +- Re: Page fetching cache controller1MitchAlsup1
6 Nov 24 i   i    `* Re: Q+ Fibonacci57Robert Finch
17 Apr 25 i   i     `* Re: register sets56Robert Finch
17 Apr 25 i   i      +* Re: register sets53Stephen Fuld
17 Apr 25 i   i      i+- Re: register sets1Robert Finch
17 Apr 25 i   i      i+* Re: register sets46MitchAlsup1
18 Apr 25 i   i      ii`* Re: register sets45Robert Finch
18 Apr 25 i   i      ii `* Re: register sets44MitchAlsup1
20 Apr 25 i   i      ii  `* Re: register sets43Robert Finch
21 Apr 25 i   i      ii   `* Re: auto predicating branches42Robert Finch
21 Apr 25 i   i      ii    `* Re: auto predicating branches41Anton Ertl
21 Apr 25 i   i      ii     +- Is an instruction on the critical path? (was: auto predicating branches)1Anton Ertl
21 Apr 25 i   i      ii     `* Re: auto predicating branches39MitchAlsup1
22 Apr 25 i   i      ii      `* Re: auto predicating branches38Anton Ertl
22 Apr 25 i   i      ii       +- Re: auto predicating branches1MitchAlsup1
22 Apr 25 i   i      ii       `* Re: auto predicating branches36Anton Ertl
22 Apr 25 i   i      ii        `* Re: auto predicating branches35MitchAlsup1
23 Apr 25 i   i      ii         +* Re: auto predicating branches3Stefan Monnier
23 Apr 25 i   i      ii         i`* Re: auto predicating branches2Anton Ertl
25 Apr 25 i   i      ii         i `- Re: auto predicating branches1MitchAlsup1
23 Apr 25 i   i      ii         `* Re: auto predicating branches31Anton Ertl
23 Apr 25 i   i      ii          `* Re: auto predicating branches30MitchAlsup1
24 Apr 25 i   i      ii           `* Re: asynch register rename29Robert Finch
27 Apr 25 i   i      ii            `* Re: fractional PCs28Robert Finch
27 Apr 25 i   i      ii             `* Re: fractional PCs27MitchAlsup1
28 Apr 25 i   i      ii              `* Re: fractional PCs26Robert Finch
28 Apr 25 i   i      ii               +* Re: fractional PCs15MitchAlsup1
29 Apr 25 i   i      ii               i`* Re: fractional PCs14Robert Finch
5 May 25 i   i      ii               i `* Re: control co-processor13Robert Finch
5 May 25 i   i      ii               i  `* Re: control co-processor12Al Kossow
5 May 25 i   i      ii               i   `* Re: control co-processor11Stefan Monnier
6 May 25 i   i      ii               i    +* Re: control co-processor3MitchAlsup1
7 May 25 i   i      ii               i    i+- Re: control co-processor1MitchAlsup1
15 Jul 25 i   i      ii               i    i`- Re: control co-processor1MitchAlsup1
7 May 25 i   i      ii               i    `* Scan chains (was: control co-processor)7Stefan Monnier
7 May 25 i   i      ii               i     +* Re: Scan chains (was: control co-processor)2Al Kossow
7 May 25 i   i      ii               i     i`- Re: Scan chains1Stefan Monnier
7 May 25 i   i      ii               i     +* Re: Scan chains3MitchAlsup1
7 May 25 i   i      ii               i     i`* Re: Scan chains2Stefan Monnier
8 May 25 i   i      ii               i     i `- Re: Scan chains1MitchAlsup1
15 Jul 25 i   i      ii               i     `- Re: Scan chains1MitchAlsup1
29 Apr 25 i   i      ii               `* Re: fractional PCs10Robert Finch
29 Apr 25 i   i      ii                `* Re: fractional PCs9MitchAlsup1
30 Apr 25 i   i      ii                 `* Re: fractional PCs8Robert Finch
30 Apr 25 i   i      ii                  +* Re: fractional PCs6Thomas Koenig
1 May 25 i   i      ii                  i+- Re: fractional PCs1Robert Finch
2 May 25 i   i      ii                  i`* Re: fractional PCs4moi
2 May 25 i   i      ii                  i +* Re: millicode, extracode, fractional PCs2John Levine
2 May 25 i   i      ii                  i i`- Re: millicode, extracode, fractional PCs1moi
2 May 25 i   i      ii                  i `- Re: fractional PCs1moi
30 Apr 25 i   i      ii                  `- Re: fractional PCs1MitchAlsup1
15 Jul 25 i   i      i`* Re: register sets5John Savard
15 Jul 25 i   i      i `* Re: register sets4MitchAlsup1
19 Jul 25 i   i      i  `* Re: register sets3Robert Finch
19 Jul 25 i   i      i   `* Re: register sets2Anton Ertl
19 Jul 25 i   i      i    `- Re: register sets1MitchAlsup1
15 Jul 25 i   i      `* Re: register sets2John Savard
15 Jul 25 i   i       `- Re: register sets1MitchAlsup1
13 Oct 24 i   `- Re: Tonights Tradeoff - Background Execution Buffers1Anton Ertl
4 Oct 24 +- Re: Tonights Tradeoff - Background Execution Buffers1BGB
6 Oct 24 `- Re: Tonights Tradeoff - Background Execution Buffers1MitchAlsup1

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