Re: Why VAX Was the Ultimate CISC and Not RISC

mitchalsup@aol.com (MitchAlsup1) writes:

On Sat, 1 Mar 2025 11:58:17 +0000, Anton Ertl wrote:

As for code size, we see significantly smaller code for RISC
instruction sets with 16/32-bit encodings such as ARM T32/A32 and
RV64GC than for all CISCs, including AMD64, i386, and S390x
<2024Jan4.101941@mips.complang.tuwien.ac.at>.  I doubt that VAX fares
so much better in this respect that its code is significantly smaller
than for these CPUs.

>
VAX's advantage was it executed fewer instructions (VAX only executed
65% of the number of instructions R2000 executed.)

This agrees with my estimate that a CPU with 3 RV32GC MIPS would have
the same performance as a CPU with 2 VAX MIPS.

Bottom line: If you sent, e.g., me and the needed documents back in
time to the start of the VAX project, and gave me a magic wand that
would convince the DEC management and workforce

>
You would also have to convince the Computer Science department at
CMU; Where a lot of VAX ideas were dreamed up based on the success
of the PDP-11.

Yes, include that in my magic wand.

A pipelined machine in 1978 would have had 50% to 100% more circuit
boards than VAX 11/780, making it a lot more expensive.

What makes you think that a pipelined single-issue RV32GC would take
more circuit boards than VAX11/780?  I have no data about discrete
implementations, but if we look at integrated ones and assume that the
number of transistors or the area corresponds to the number of circuit
boards in discrete implementations, the evidence goes in the opposite
direction:

Transistors area proc CPU
125,000    74.82 3um  MicroVAX 78032 (integer-only, some instructions missing)
 68,000    44   3.5um 68,000 (integer-only, no MMU)
 45,000    58.52 2um  ROMP (integer-only, no MMU, three pipeline stages)
 25,000    50    3um  ARM1 (integer-only, no MMU, pipelined)
110,000     ?   1.2um SPARC MB86900 (integer-only, pipelined)
110,000    80     2um MIPS R2000 (integer-only, pipelined)

It seems that the MMU cost a lot of transistors, while the pipelining
did not, as especially the ARM1 shows.

The design point you target for the original VAX would have taken
significantly longer to design, debug, and ship.

What makes you think so?  A major selling point of RISC especially
compared to the VAX was that the reduced instruction-set complexity
reduces the implementation effort.  And the fact that the students of
Berkeley and Stanford could produce their prototypes in a short time
lends credibility to the claim.  We also have some timelines we can
compare:

<https://en.wikipedia.org/wiki/PA-RISC> says:
|In early 1982, work on the Precision Architecture began at HP
|Laboratories, defining the instruction set and virtual memory
|system. Development of the first TTL implementation started in April
|1983. With simulation of the processor having completed in 1983, a
|final processor design was delivered to software developers in July
|1984. Systems prototyping followed, with "lab prototypes" being
|produced in 1985 and product prototypes in 1986.[7]
|
|The first processors were introduced in products during 1986.

<https://www.hpmuseum.net/display_item.php?hw=836> writes:
|The 3000/930 and 3000/950 were both announced in March of 1986 but did
|not ship until the second half of 1987.

So here we actually have a discrete implementation of a RISC.

You write that VAX work began in 1973; it was introduced in 1977 (but
when where machines shipped to customers?), which would mean that
development also took 4 years.  According to
<https://en.wikipedia.org/wiki/VAX-11>, development began in 1976, but
that is hard to believe, especially given the CISC-based problems such
as having to keep many pages in physical memory at the same time.

<https://people.computing.clemson.edu/~mark/330/eagle.html#timeline>
says about the Data General Eclipse MV/8000:
|spring 1978 - Eagle project starts
|summer 1978 - recruiting of Hardy Boys and Microkids
||April 1979 - projected Eagle completion date (missed)
|June 1979 - West presents Eagle at Product Board Meeting
|mid-1979 - Eagle supporter and VP of Engineering Carl Carmen leaves DG
|October 1979 - Gallifrey Eagle moved to software department
|November 1979 - Tom West transferred
|2H79 and early 1980 - difficulties with PAL supplier;
|                      hardware debugging and software development continue
|April 1980 - public announcement of MV/8000
|fall 1980 - Eclipse group reorganized

It's not clear when the MV/8000 was delivered to the customers.

The same timeline also contains Data General's Plan A (Eagle was Plan
B), the more ambitious FHP which makes the writable control store
available to third-party software, i.e., it's in a way a further step
in the thinking that led to CISC:

|July 1975 - FHP project starts
|September 1977 - EGO vs. FHP meeting; FHP version promised in a year
|early 1979 - news that FHP will miss deadline "by a huge margin"
|November 1981 - FHP demo

BTW, the existence of writable control stores before the release of
the VAX is further counterevidence to the claim that at the time of
the VAX, microcode ROM was so much faster and that fast SRAM was not
an option: The DEC PDP-10 KL10 (1975) has 80*1280bits (12.5KB) or
80*2K bits (20KB) of WCS, depending on the model, and they were the
machines that the VAX-11/780 was going to replace.  So not only did
RISCs not need cache to perform better than a VAX-11/780, for a
machine in the price class of the VAX-11/780 you could also have cache
to gain even more speed; the 2KB of the VAX-11/780 itself would help,
but bigger caches were possible and could help more.

<https://en.wikipedia.org/wiki/I386> says:
|Development of i386 technology began in 1982 under the internal name
|of P3.[4] The tape-out of the 80386 development was finalized in July
|1985.[4] The 80386 was introduced as pre-production samples for
|software development workstations in October 1985.[5] Manufacturing
|of the chips in significant quantities commenced in June 1986 ... The
|first personal computer to make use of the 80386 was the Deskpro 386.

The Compaq DeskPro 386 was released on September 9, 1986.  But the
i386 was a single chip, not a discrete implementation, which may have
had an influence on development time.  IBM took until July 1987 to
introduce their first computer with an i386.

- anton
--
'Anyone trying for "industrial quality" ISA should avoid undefined behavior.'
  Mitch Alsup, <c17fcd89-f024-40e7-a594-88a85ac10d20o@googlegroups.com>