Re: Top of the PCIe tree

MitchAlsup1 <mitchalsup@aol.com> wrote:

Let us consider a device down on the PCIe tree and it sends up a
DMA request. The device can manage a large number of outstanding
commands to a single process or to multiple different processes.
{{Same problem for interrupts and ATS requests}}
 
DMA from device Bus;Device,function arrives at the HostBridge.
 
What part of the PCIe message identifies which command this
PCIe message is for (since the device can have a large number
of commands outstanding) ?

There's a 5 bit tag in the PCIe TLP - when the response comes back, the
device can use the tag to identify which request it relates to.

(not sure if any of the PCIe extensions extend this to more than 5 bits, as
it means only 32 transactions can be in flight from one BDF)

Theo