Re: The Design of Design

According to Thomas Koenig  <tkoenig@netcologne.de>:

S/360 invented eight bit byte addressed memory with larger power of 2

Brooks wrote that the design was supposed to have been 32-bit
clean from the start, but that the people who implemented the BALR
instruction (which puts some bits of the PSW into the high-value
byte) didn't follow that guideline.  He blamed himself for not making
that sufficiently clear to all the design team.

Yup.  Even worse, the OS programmers were under extreme pressure
to save memory so in every data structure with address words,
they used the high byte for flags or other stuff.  So when they
went to 31 bit addressing, they needed new versions of all of
the control blocks.

I thought the PDP-10 was swell, but even if DEC had been able to
design and ship the Jupiter follow-on to the KL-10, its expanded
addressing was a kludge. It only provided addressing 8M words or about
32M bytes with no way to go past that.

I misread the manual. The extended addresses were 30 bits or about 4GB
which was plenty for that era, but the way they did it in 256K word
sections was still a kludge. In the original PDP-6/10 every
instruction could address all of memory. In extended mode you could
directly address only the current section, and everything else needed
an index register or an indirect address.

While this wasn't terribly hard, it did mean that any time you wanted
to change a program to run in extended mode you had to look at all the
code and check every instruction that did an address calculation,
which was tedious.

Reading
>
http://bitsavers.informatik.uni-stuttgart.de/pdf/dec/pdp10/KC10_Jupiter/ExtendedAddressing_Jul83.pdf
>
I concur that it was a kludge, but at least they seem to have
allowed for further extension by reserving a 1-1- bit pattern,
as an illegal indirect word.

Given that it could already address 4GB I don't think that would help, since anything
larger would need multi-word addresses which would be an even worse kludge.

However, one questions.  Designs like the PDP-10 or the UNIVAC
(from what I read on Wikipedia) had "registers" at certain
memory locations.  On the PDP-10, it even appears to have been
possible to run code in the first memory locations/registers.

Funny you should mention that. On the PDP-6/10, the registers were the
first 16 memory locations. There were no register to register
instructions since you used the regular instruction with a memory
address between 0 and 017. You could indeed run code in the registers
which was somewhat faster. I wrote a little multi-precision factorial
routine that ran in the registers.

It seems that the /360 was the first machine which put many
registers into a (conceptually) separate space, leaving them open
to implementing them either in memory or as faster logic.
>
Is that the case, or did anybody beat them to it?

On the PDP-6 and KA-10 the transistor registers were an extra cost
option, so you could order your machine either way. I believe that DEC
never shipped a machine without the fast registers since the speed
difference was so great.
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