Re: Byte Addressability And Beyond

MitchAlsup1 wrote:

Terje Mathisen wrote:
 

>

 

That logic already exists, in the form of a single thread/core
dedicated
to the job.

 

With 30-100 cores on a single die, it becomes very cheap to dedicate
one
of them to babysit such a process, compared to the cost of making a custom chunk of VLSI to do the same. This is particularly true because the logic needed in the babysitting process is mostly straight line, with a very limited number of hard-to-predict branches.

 

I.e. h.264 CABAC decoding has three branches per bit decoded, at least one of them impossible to predict or work around with clever coding.

 How many instructions in the then-clause and in the else-clause ??
If these are smaller than 8, My 66000 can process them without
"branching" using predication.

No, the real problem is the context branching: After doing the 50% branch you pick up one of two alternative contexts and follow totally different paths, i.e. you cannot simply use the branch bit as an index.
I found ways to bypass the issues with the other two branches but this one is fundamental.
Terje
--
- <Terje.Mathisen at tmsw.no>
"almost all programming can be viewed as an exercise in caching"