Sujet : Re: Instruction Tracing
De : ldo (at) *nospam* nz.invalid (Lawrence D'Oliveiro)
Groupes : comp.archDate : 12. Aug 2024, 07:33:17
Autres entêtes
Organisation : A noiseless patient Spider
Message-ID : <v9cabd$363e5$1@dont-email.me>
References : 1 2 3 4 5 6
User-Agent : Pan/0.159 (Vovchansk; )
On Mon, 12 Aug 2024 05:29:29 GMT, Anton Ertl wrote:
Already the 21064 is two-wide superscalar (1 integer unit, 1 FPU, 1
load/store unit, don't remember if the branch unit could run in parallel
to the ALU; I think not). And it has very high clock speeds for its
time; it appeared with 150MHz while the competition was like 50MHz
(SuperSPARC, superscalar) to 100MHz (MIPS R4000, not superscalar), or,
for Power, 62.5MHz in the POWER1++. But POWER1 (without ++) preceded
the 21064 by 2 years.
But in spite of having, say, 2½ times the clock speed of POWER, Alpha was
not 2½ times faster, was it?