Sujet : Re: Instruction Tracing
De : ldo (at) *nospam* nz.invalid (Lawrence D'Oliveiro)
Groupes : comp.archDate : 12. Aug 2024, 09:42:51
Autres entêtes
Organisation : A noiseless patient Spider
Message-ID : <v9chub$37gr9$5@dont-email.me>
References : 1 2 3 4 5 6 7 8
User-Agent : Pan/0.159 (Vovchansk; )
On Mon, 12 Aug 2024 11:09:18 +0300, Michael S wrote:
On Mon, 12 Aug 2024 06:33:17 -0000 (UTC)
Lawrence D'Oliveiro <ldo@nz.invalid> wrote:
But in spite of having, say, 2½ times the clock speed of POWER, Alpha
was not 2½ times faster, was it?
Of course not.
That’s what I mean: it took several clock cycles per instruction, contrary
to just about every other RISC architecture.