Re: arm ldxr/stxr vs cas

On 9/2/2024 10:27 AM, jseigh wrote:

I read that arm added the cas instruction because they didn't think
ldxr/stxr would scale well.  It wasn't clear to me as to why that
would be the case.  I would think the memory lock mechanism would
have really low overhead vs cas having to do an interlocked load
and store.  Unless maybe the memory lock size might be large
enough to cause false sharing issues.  Any ideas?

Reservation granularity? Wrt the PPC, wow this an older thread:
https://groups.google.com/g/comp.arch/c/yREvvvKvr6k/m/nRZ5tpLwDNQJ
LL/SC can spuriously fail... It's more obstruction free than lock-free? I think this is why a strong and weak CAS are in the C/C++ std's?