Re: Is Intel exceptionally unsuccessful as an architecture designer?

MitchAlsup1 <mitchalsup@aol.com> wrote:

On Fri, 20 Sep 2024 21:54:36 +0000, Chris M. Thomasson wrote:
 

On 9/20/2024 2:32 PM, Lawrence D'Oliveiro wrote:

On Fri, 20 Sep 2024 11:21:52 -0400, Stefan Monnier wrote:
 

The basic issue is:
* CPU+motherboard RAM -- usually upgradeable
* Addon coprocessor RAM -- usually not upgradeable

 
Maybe the RAM of the "addon coprocessor" is not upgradeable, but the
addon board itself can be replaced with another one (one with more RAM).

 
Yes, but that’s a lot more expensive.

 
I had this crazy idea of putting cpus right on the ram. So, if you add
more memory to your system you automatically get more cpu's... Think
NUMA for a moment... ;^)

 
Can software use the extra CPUs ?
 
Also note: DRAMs are made on P-Channel process (leakage) with only a few
layer of metal while CPUs are based on a N-Channel process (speed) with
many layers of metal.

Didn’t you work on the MC68000 which had one layer of metal?

This could be fine if you are going for the AI market of slow AI cpu with
huge memory and bandwidth.

The AI market is bigger than the general server market as seen in NVidea’s
sales.

Bus interconnects are not setup to take a CPU cache miss from one
DRAM to a different DRAM on behalf of its contained CPU(s).
{Chicken and egg problem}

Such a dram would be on the PCIE busses, and the main CPU’s would barely
touch that ram, and the AI only searches locally.