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mitchalsup@aol.com (MitchAlsup1) writes:Okay,On Sat, 5 Apr 2025 3:45:51 +0000, Robert Finch wrote:
>On ARM64, when the HV needs to write to guest user VA or guest PA,Would not writing to the GuestOs VAS and the application VAS be the>
result of separate system calls? Or does the hypervisor take over for
the GuestOS?
Application has a 64-bit VAS
GusetOS has a 64-bit VAS
HyprVisor has a 64-bit VAS
and so does
Securte has a 64-bit VAS
>
So, we are in HV and we need to write to guestOS and to Application
but we have only 1-bit of distinction.
the SMMU provides an interface the processor can use to translate
the guest VA or Guest PA to the corresponding system physical address.
Of course, there is a race if the guest OS changes the underlying
translation tables during the upcall to the hypervisor or secure
monitor, although that would be a bug in the guest were it so to do,
since the guest explicitly requested the action from the higher
privilege level (e.g. HV).
Arm does have a set of load/store "user" instructions that translate
addresses using the unprivileged (application) translation tables. There's
also a processor state bit (UAO - User Access Override) that can
be set to force those instructions to use the permissions associated
with the current processor privilege level.
Note that there is a push by all vendors to include support
for guest 'privacy', such that the hypervisor has no direct
access to memory owned by the guest, or where the the guest
memory is encrypted using a key the hypervisor or secure monitor
don't have access to.
Les messages affichés proviennent d'usenet.