Got hung up on the predicate logic and decided to tackle something easier but similar. Having branches automatically convert into predicates when they branch forward a short distance <7 instructions. The instructions are likely already in the pipeline since it is only one or two instruction groups.>Stark uses a four bit code to encode where on the cache line a large constant is located. The assembler just piles them up at the end of the cache line. Sometimes space is wasted if an instruction with a constant will not fit on the cache line. I think it is <6%. It has got to be close to the finagling that RISCV does for larger constants.
I have several examples where My 66000 with only 32-GPRs compiles
to fewer instructions than RISC-V with 32+32 registers.
>
I have other examples where My 66000 does not need spill/fill code
and RISC-V does, too.
>>>
I like having the extra register files, it is just a personal
programming convenience. It reduces the pressure on the general-purpose
register file.
Universal constants also reduces pressure both on ISA on the GPRs, and
on executing instructions.>Lower case r?
>
Changing the capital R in RISC into a lower case r ?!?
Been working on predicate logic tonight. Predicate shadow is limited to six instruction due to a limited mask size. Can always code more of the same predicate to skip more instructions.
I have the code searching the ROB backwards until a predicate instruction is encountered, to determine if there is a predicate. Searching fewer instructions helps. Probably not the cleverest way of doing things, sort of brute force.
Ran into issues with the predicate logic and the LOC were just exploding. Better to work on improving the branches first, predicates might fall out later.
| Date | Sujet | # | Auteur | |
| 17 Apr 25 |  Re: register sets | 56 | Robert Finch | |
| 17 Apr 25 |  Re: register sets | 53 | Stephen Fuld | |
| 17 Apr 25 |   Re: register sets | 1 | Robert Finch | |
| 17 Apr 25 | Re: register sets | 46 | MitchAlsup1 | |
| 18 Apr 25 |  Re: register sets | 45 | Robert Finch | |
| 18 Apr 25 |  Re: register sets | 44 | MitchAlsup1 | |
| 20 Apr 25 | Re: register sets | 43 | Robert Finch | |
| 21 Apr 25 | Re: auto predicating branches | 42 | Robert Finch | |
| 21 Apr 25 | Re: auto predicating branches | 41 | Anton Ertl | |
| 21 Apr 25 | Is an instruction on the critical path? (was: auto predicating branches) | 1 | Anton Ertl | |
| 21 Apr 25 | Re: auto predicating branches | 39 | MitchAlsup1 | |
| 22 Apr 25 | Re: auto predicating branches | 38 | Anton Ertl | |
| 22 Apr 25 | Re: auto predicating branches | 1 | MitchAlsup1 | |
| 22 Apr 25 | Re: auto predicating branches | 36 | Anton Ertl | |
| 22 Apr 25 | Re: auto predicating branches | 35 | MitchAlsup1 | |
| 23 Apr 25 | Re: auto predicating branches | 3 | Stefan Monnier | |
| 23 Apr 25 | Re: auto predicating branches | 2 | Anton Ertl | |
| 25 Apr 25 | Re: auto predicating branches | 1 | MitchAlsup1 | |
| 23 Apr 25 | Re: auto predicating branches | 31 | Anton Ertl | |
| 23 Apr 25 | Re: auto predicating branches | 30 | MitchAlsup1 | |
| 24 Apr 25 | Re: asynch register rename | 29 | Robert Finch | |
| 27 Apr 25 | Re: fractional PCs | 28 | Robert Finch | |
| 27 Apr 25 | Re: fractional PCs | 27 | MitchAlsup1 | |
| 28 Apr 25 | Re: fractional PCs | 26 | Robert Finch | |
| 28 Apr 25 | Re: fractional PCs | 15 | MitchAlsup1 | |
| 29 Apr 25 | Re: fractional PCs | 14 | Robert Finch | |
| 5 May 25 | Re: control co-processor | 13 | Robert Finch | |
| 5 May 25 | Re: control co-processor | 12 | Al Kossow | |
| 5 May 25 | Re: control co-processor | 11 | Stefan Monnier | |
| 6 May 25 | Re: control co-processor | 3 | MitchAlsup1 | |
| 7 May 25 | Re: control co-processor | 1 | MitchAlsup1 | |
| 15 Jul 25 | Re: control co-processor | 1 | MitchAlsup1 | |
| 7 May 25 | Scan chains (was: control co-processor) | 7 | Stefan Monnier | |
| 7 May 25 | Re: Scan chains (was: control co-processor) | 2 | Al Kossow | |
| 7 May 25 | Re: Scan chains | 1 | Stefan Monnier | |
| 7 May 25 | Re: Scan chains | 3 | MitchAlsup1 | |
| 7 May 25 | Re: Scan chains | 2 | Stefan Monnier | |
| 8 May 25 | Re: Scan chains | 1 | MitchAlsup1 | |
| 15 Jul 25 | Re: Scan chains | 1 | MitchAlsup1 | |
| 29 Apr 25 | Re: fractional PCs | 10 | Robert Finch | |
| 29 Apr 25 | Re: fractional PCs | 9 | MitchAlsup1 | |
| 30 Apr 25 | Re: fractional PCs | 8 | Robert Finch | |
| 30 Apr 25 | Re: fractional PCs | 6 | Thomas Koenig | |
| 1 May 25 | Re: fractional PCs | 1 | Robert Finch | |
| 2 May 25 | Re: fractional PCs | 4 | moi | |
| 2 May 25 | Re: millicode, extracode, fractional PCs | 2 | John Levine | |
| 2 May 25 | Re: millicode, extracode, fractional PCs | 1 | moi | |
| 2 May 25 | Re: fractional PCs | 1 | moi | |
| 30 Apr 25 | Re: fractional PCs | 1 | MitchAlsup1 | |
| 15 Jul 25 | Re: register sets | 5 | John Savard | |
| 15 Jul 25 | Re: register sets | 4 | MitchAlsup1 | |
| 19 Jul 25 | Re: register sets | 3 | Robert Finch | |
| 19 Jul 25 | Re: register sets | 2 | Anton Ertl | |
| 19 Jul 25 | Re: register sets | 1 | MitchAlsup1 | |
| 15 Jul 25 | Re: register sets | 2 | John Savard | |
| 15 Jul 25 | Re: register sets | 1 | MitchAlsup1 |
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