Re: Capabilities, Anybody?

Robert Finch <robfi680@gmail.com> wrote:

I am wondering if the ‘R’ term in the CHERI concentrate expansion calc
can be less than zero or if it is a modulo value. It is shown as
B[13:11] – 1. I am assuming it can go negative and is not modulo.

I understand it is signed, so can go negative:

https://github.com/CTSRD-CHERI/sail-cheri-riscv/blob/6e3613a2c46fb809e526b55c5c72acb041194ab8/src/cheri_cap_common.sail#L276

How “open” is CHERI ? Can CHERI based code be posted?

CHERI is as open as we can make it:

The architecture specification is published: https://www.cl.cam.ac.uk/techreports/UCAM-CL-TR-951.pdf

We have an agreement with Arm that 'capability essential IP' (ie IP which is
fundamental to the architecture, rather than details of the implementation)
is public and they won't patent it.

The Morello architecture spec is published.  How Arm do their implementation
is up to them.

The CHERI-RISC-V (and MIPS) architectures are published in the above.
architecture specification.  The Sail formal models are open source:
https://github.com/CTSRD-CHERI/sail-cheri-riscv

We have an ongoing effort to standardised CHERI through the RISC-V
standardisation process.

CHERI software (compiler, toolchain, CheriBSD, application changes) and
RISC-V (and MIPS) hardware artifacts (implementation of CHERI cores in RTL)
are open source.


There's certainly no problems about posting CHERI code - to be encouraged!

Theo