Re: Efficiency of in-order vs. OoO

On 1/22/24 9:44 AM, Paul A. Clayton wrote:
[snip]

Obviously an extremely biased workload like the data analysis
workloads targeted by Intel's research chip would probably show
A55 in a better light (though A55 would likely be very inefficient
compared to the research design, I think it used 4-way threaded
in-order cores with limited cache and narrow memory channels [to avoid 64-byte accesses to access 64-bits or less of data]), but
that would not be "fair".

I (finally) found a reference to the Intel research chip.
https://ieeexplore.ieee.org/document/10188866
"The Intel Programmable and Integrated Unified Memory Architecture
Graph Analytics Processor" (Sriram Aananthakrishnan et al., 2023)
A PDF of the paper appears to be available at
https://heirman.net/papers/aananthakrishnan2023piuma.pdf