Re: Efficiency of in-order vs. OoO

On 3/24/24 4:39 PM, Scott Lurndal wrote:

mitchalsup@aol.com (MitchAlsup1) writes:

Paul A. Clayton wrote:

 

(I was also very surprised by how much extra state the A55 has:
over 100 extra "registers". Even though these are not all 64-bit
data storage units, this was still a surprising amount of extra
state for a core targeting area efficiency. The storage itself may
not be particularly expensive, but it gives some insight into how
complex even a "simple" implementation can be.)

>
Imaging having to stick all this stuff on a die at 2µ instead of 5nm !!

 I suspect Paul is refering to what ARMv8 calls "System Registers";

Yes. (There were also some debug registers, performance monitoring
registers, trace registers, etc.)

despite the name, most are stored in flops, and in the case of
the ID registers, wires (perhaps anded with local e-fuses).

Yes, many of the bits would be implemented as ROM/PROM and many
would presumably be scattered about because they control/interact
with specific functionality. They are similar I/O device
registers. (I/O devices have also become more complex.)
However, having over 100 seems like a lot. Supporting performance
counters and tracing is also something that would have been nearly
inconceivable for something like the MIPS R2000.
An argument might be made that some designs would have no use for
most of such extra state. Performance monitoring is useful for
software development (and theoretically for OS decisions for
scheduling, core migration, and other functions), but seems likely
to be highly underutilized for typical use. A55 is presumably
large enough that a synthesis-time remove of much of this
functionality would have a tiny effect on total area. Even for a
microcontroller the area cost might not be problematic.