Re: "Mini" tags to reduce the number of op codes

BGB-Alt wrote:

On 4/4/2024 3:32 AM, Terje Mathisen wrote:

MitchAlsup1 wrote:

 

As I can note, in my actual ISA, any type-tagging in the registers was explicit and opt-in, generally managed by the compiler/runtime/etc; in this case, the ISA merely providing facilities to assist with this.

The main exception would likely have been the possible "Bounds Check Enforce" mode, which would still need a bit of work to implement, and is not likely to be terribly useful.

A while back (and maybe in the future) My 66000 had what I called the Foreign Access Mode. When the HoB of the pointer was set, the first
entry in the translation table was a 4 doubleword structure, A Root
pointer, the Lowest addressable Byte, the Highest addressable Byte,
and a DW of access rights, permissions,... While sort-of like a capability
I don't think it was close enough to actually be a capability or used as
one.
So, it fell out of favor, and it was not clear how it fit into the HyperVisor/SuperVisor model, either.

                                  Most complicated and expensive parts are that it will require implicit register and memory tagging (to flag capabilities). Though, cheaper option is simply to not enable it, in which case things either behave as before, with the new functionality essentially being NOP. Much of the work still needed on this would be getting the 128-bit ABI working, and adding some new tweaks to the ABI to play well with the capability addressing (effectively it requires partly reworking how global variables are accessed).

The type-tagging scheme used in my case is very similar to that used in my previous BGBScript VMs (where, as I can note, BGBCC was itself a fork off of an early version of the BGBScript VM, and effectively using a lax hybrid typesystem masquerading as C). Though, it has long since moved to a more proper C style typesystem, with dynamic types more as an optional extension.

In general, any time one needs to change the type you waste an instruction
compared to type less registers.