Re: "Mini" tags to reduce the number of op codes

Stephen Fuld wrote:

On 4/3/2024 11:44 AM, EricP wrote:

  If you are adding a float/int data type flag you might as well
also add operand size for floats at least, though some ISA's
have both int32 and int64 ALU operations for result compatibility.

Not needed for My 66000, as all floating point loads convert the loaded value to double precision.

Insufficient verbal precision::
My 66000 only cares about the size of a value being loaded from memory
(or ST into memory).
While (float) LDs load the 32-bit value from memory, they remain (float)
while residing in the register; and the High Order 32-bits are ignored.
The (float) register can be consumed by a (float) FP calculation and it
remains (float) after processing.
Small immediates, when consumed by FP instructions, are converted from
integer to <sized> FP during DECODE. So::
     FADD   R7,R7,#1
adds 1.0D0 to the (double) value in R7 (and takes one 32-bit instruction), while:
     FADDs  R7,R7,#1
Adds 1.0E0 to the (float) value in R7.