Re: Short Vectors Versus Long Vectors

Lawrence D'Oliveiro wrote:

On Tue, 23 Apr 2024 22:40:25 +0000, MitchAlsup1 wrote:

Lawrence D'Oliveiro wrote:
 

On Tue, 23 Apr 2024 17:34:12 +0000, MitchAlsup1 wrote:

 

As to why RISC-V went shorter ...

 

They didn’t fix a length.

 Nor do they want to have to save a page of VRF at context switch.

But then, you don’t need a whole array of registers, do you: you just need operand (one for each operand) and destination address registers, plus a counter.

If by 'you' you mean My 66000's VVM::
a) yes I avoid any SW visible register file
b) and I use the miss buffers as the VRF register file pool
c) they vanish on an interrupt or exception
d) the counter is the loop valiable.