Re: Short Vectors Versus Long Vectors

John Savard <quadibloc@servername.invalid> writes:

On Wed, 24 Apr 2024 02:00:10 +0000, mitchalsup@aol.com (MitchAlsup1)
wrote:
>

Everyone has to have hope on something.

>
But false hopes are a waste of time.
>
The reason for my interest in long vectors is primarily because I
imagine that, if the Cray I was an improvement on the IBM System/360
Model 195, then, apparently, today a chip  like the Cray I would be
the next logical step after the Pentium II (OoO plus cache, just like
a Model 195).

But the Cray-1 is not an improvement on the Model 195.  It has no
cache.  Neither the Cray-1 nor the Model 195 have OoO as the term is
commonly understood today: OoO execution, in-order completion,
allowing register renaming, speculative execution, and precise
exceptions.  One may consider the Model 91/195 a predecessor of
today's OoO, because it supports register renaming, and you "just"
need to add a reorder buffer to get in-order completion and
speculative execution.

Well, apparently they do things like multiply 2048 by 2048 matrices.
Which is why they need stride.

You can multiply dense matrices of any size efficiently with stride 1.
And caches help a lot for matrix multiply; in HPC circles, (dense)
matrix multiply is known as cache-friendly problem.

- anton
--
'Anyone trying for "industrial quality" ISA should avoid undefined behavior.'
  Mitch Alsup, <c17fcd89-f024-40e7-a594-88a85ac10d20o@googlegroups.com>