Re: ancient 704 architecture, The Design of Design

According to Thomas Koenig  <tkoenig@netcologne.de>:

They had inverter, two-input NAND, two-input NOR, Pentagrid as a
two-input OR, and a cheap Diode Switch (DS) as two-input AND) as
logic gates.  The 704 seems to have used mostly AND and OR gates,
so the decision to AND the index register with the bit from the
instruction and then OR them together actually seems straightforward,
this also gives you zero if none of them is selected.
>
Having the possibility of more than one index register seems to
have been a consequence of design which allowed for zero or the
content of one register as the main purpose.  Even if no documents
survive to prove this, I'm fairly confident that this is why
they did it.

That has been my assumption too, despite the lack of documentation.

Each intruction used 3 bits to specify the index register(s). They
could have used 2 bits and decoded them with more logic, but my guess,
again with no documentation at all, is that they already had 15
address bits which allowed 32K words which in 1954 was an enormous
amount of memory. Encoding the index would give an extra address bit
and 64K of memory, but who'd be able to afford that much?

The 704 manual says that you could get 4K, 8K, or 32K. I haven't been
able to find out how big typical memories were. General Motors' 704
had 8K, no hint about anyone else's.

Programmers being programmers, they probably started using the
feature for some multi-dimensional arrays with sizes of powers
of two, and IBM was then stuck with the feature.

There was a somewhat less implausible use. The PAX and PDX
instructions put the address or decrement part of the AC into
an index register, and you could load 2 or 3 index registers
at the same time if you wanted.


--
Regards,
John Levine, johnl@taugh.com, Primary Perpetrator of "The Internet for Dummies",
Please consider the environment before reading this e-mail. https://jl.ly