Re: Byte Addressability And Beyond

EricP wrote:

Lawrence D'Oliveiro wrote:

On Sat, 04 May 2024 15:21:04 GMT, Scott Lurndal wrote:
 

d) all modern major architectures have instructions for bitfield
manipulation (insert, extract) obviating any need for general bit-level
addressing.

 Even if those bottom three bits of the address must be zero in every other instruction but these, I thought it would be convenient to have them, just for these bitfield instructions. It would save passing around a separate bit-offset field in arbitrary-bit-aligned pointers.

Its not just the bit address that you have to carry about
but also field width and type (zero/sign extend) on extract.

No different from signed/unsigned bytes, halfwords, and words.

To my eye the cost of bit fields is primarily in dealing at run time
with the potential for straddles across memory locations and registers.
It makes for a lot of fiddly little IF code blocks which then have to be
put into general subroutines.

In My 66000 ISA, one can use CARRY to concatenate 2 registers into 1 container and then extract or insert into the double wide container
EVEN when there is no straddling of boundaries! This gets rid of a
lot of the fiddling.

A second issue occurs when there are multiple bit fields is
optimizing this so it only loads and stores with memory when it has to.
If r1 contains a low straddle part and r2 the high straddle part,
and we have already updated one bit field in those parts,
if we want to update a second bit field,
then we need to check if it is wholly contained within those
two registers, or one or both need to be spilled and reloaded.

Obviously.

A lot of this fiddly code looks like it would be best
implemented with predication.

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