Re: Oops (Concertina II Going Around in Circles)

On Thu, 9 May 2024 20:28 +0100 (BST), jgd@cix.co.uk (John Dallman)
wrote:

I think you've just added another couple of orders of magnitude to the
odds against that happening.

What, you don't think that an ISA that is capable of handlling an
instruction set two orders of magnitude larger than ordinary
instruction sets wouildn't have a highly sought-after feature, at
least for some niches?

Instructions are multiples of 16 bits in length, like on a Motorola
68000 or an IBM System/360, not multiples of eight bits like on x86...
so headers provide a way to add just a few bits to instructions
instead of adding a whole 16 bits, when that isn't needed.

And after devising a mechanism to use _three_ extra opcode spaces in
the instruction set... I merely decided to be proactive, and give the
architecture room for further expansion, by generalizing it a tad
more, and allow an additional 123 opcode spaces, potentially of equal
or larger size. (Larger because an additional opcode space could have
the bigger than 32 bit instructions all start with 1 instead of 1111,
and thus have more opcode space because of having a larger proportion
of longer instructions.)

John Savard