Re: branch address architecture, not interactive use, The Design of Design

John Levine <johnl@taugh.com> writes:

You could do some funky things with PDP-11 jumps like
>
 JMP @(R4)+
>
which dispatched to the next routine of threaded code pointed to by R4.

Interestingly, the 68000 has a (An)+ addressing mode, but

1) "JMP op" is equivalent to "LEA op -> PC" rather than "MOV.l op -> PC"

2) The 68000 does not allow JMP (An)+

So you need to write that as

MOV.l (A0)+,A1
JMP (A1)

IA-32 (and AMD64) does not make mistake 1), but it has no
autoincrement addressing mode, so you have to implement that as, e.g.

add 8, %rbx
jmp -8(%rbx)

(or possibly arrange the convention between the threaded-code routines
to avoid the -8).

- anton
--
'Anyone trying for "industrial quality" ISA should avoid undefined behavior.'
  Mitch Alsup, <c17fcd89-f024-40e7-a594-88a85ac10d20o@googlegroups.com>