Re: mainframe Byte Addressability And Beyond

According to Terje Mathisen  <terje.mathisen@tmsw.no>:

Read all about it: https://www.vm.ibm.com/library/other/22783213.pdf
 
It's on page 7-251.
 

Thanks!
>
I did read all of it, and it was pretty close to how I would have
designed a sw function to do the same, except for the very funky ABI:
>
Both source and destination _must_ be an even register number, with the
following odd register providing the count/length.

That's the way they've been handling address+length pairs since they
added long compare and move instructions in S/370.  They're so common
I'd expect there to be hardware to deal with them.

Just from this little snippet I'm pretty sure this instruction has a
sizeable startup overhead, compiler support is probably in the form of
an intrinsic that knows about the need to allocate two pairs of
register, each pair starting at an even-numbered register.

Same register allocation would be needed for a string compare or move,
so that's nothing new.
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