Re: First-Part-Done (was Re: Byte Addressability And Beyond)

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Sujet : Re: First-Part-Done (was Re: Byte Addressability And Beyond)
De : mitchalsup (at) *nospam* aol.com (MitchAlsup1)
Groupes : comp.arch
Date : 03. Jun 2024, 17:36:37
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Organisation : Rocksolid Light
Message-ID : <ad853c06c5149280a309fec65b119939@www.novabbs.org>
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Scott Lurndal wrote:

Lawrence D'Oliveiro <ldo@nz.invalid> writes:
On Thu, 30 May 2024 14:42:14 -0000 (UTC), John Levine wrote:
>
The condition code tells you which it was.  If it was an interrupt, you
just branch back and keep going.
>
Does it really hurt performance for the CPU to keep track of the fact
that an instruction has to be restarted after an interrupt?
It is already a requirement that we have precise interrupts. Those Rqs
impose that the unfinished instruction is pointed at by IP on return.

Yes, of course.  And it complicates the design, which makes it harder
to verify, particularly for an out-of-order design.
If you can backup mispredicted branches, you have all the OoO HW to
restart a long running instruction.

Date Sujet#  Auteur
3 Jun 24 * Re: First-Part-Done (was Re: Byte Addressability And Beyond)3Lawrence D'Oliveiro
3 Jun 24 +- Re: First-Part-Done (was Re: Byte Addressability And Beyond)1John Levine
3 Jun 24 `- Re: First-Part-Done (was Re: Byte Addressability And Beyond)1MitchAlsup1

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