Re: architectural goals, Byte Addressability And Beyond

On Wed, 5 Jun 2024 09:40 +0100 (BST)
jgd@cix.co.uk (John Dallman) wrote:

In article <20240603130821.000076b3@yahoo.com>,
already5chosen@yahoo.com (Michael S) wrote:
 

jgd@cix.co.uk (John Dallman) wrote: 

In article <2024Jun3.074750@mips.complang.tuwien.ac.at>,
anton@mips.complang.tuwien.ac.at (Anton Ertl) wrote: 

SPARCs are big-endian and trap on unaligned access (at least
that was the case when I last used one long ago), while S/370
ff. does not trap on unaligned access.     

OK, that shoots down S/370 for this job.  

What exactly is a job?
Is it for pure personal amusement or there are practical needs? 

 
I would like to keep testing the commercial product I work on in a
big-endian, alignment-trapping environment.

May be, now is a time to stop to like to keep it?
If I was you, I'd stop carrying not only about big-endian
alignment-trapping environment, but about any alignment-trapping
environment.

However, there isn't much
budget available for this. We have a SPARC box doing it, left over
from when we actually supported Solaris, but as testing grows, its
CPU power becomes less adequate for the job.
 
New SPARC boxes are expensive, dealing with Oracle is hard work, and
the architecture has no future.
 
I've never been very serious about using Linux on IBM Z for this -
it's expensive and dealing with IBM is hard work, although the
architecture still seems to have a future - but if it doesn't trap
misaligned accesses, it's disqualified.
 
John

One of the reasons it has the future is because it doesn't trap
misaligned accesses.