Re: Privilege Levels Below User

EricP wrote:

MitchAlsup1 wrote:

John Savard wrote:
 

After all, RowHammer is caused by multiple rapid-fire accesses to the
same address, or to related addresses, in memory.

 Yes, the write buffer in my DRAM controller is the L3 cache. Modified
data in the L3 migrates towards DRAM as DRAM cycles permit, but there
is no way to cause a line to be continuously be written into DRAM.
If a modified line has migrated to DRAM, and it gets modified again
in the L3, that 2nd write will not be performed until a refresh cycle
on that DRAM is performed.
 Thus if one tries to RowHammer My 66000 DRAM, DRAM gets refresh cycle
between each write.

What does it do if L3 receives more writes than it has ways in a row,
does it stall evicts from L2?

There is a 128 line temporally organized buffer between L3 and DRAM.
So with your proposed 4-way L3, you have 130 accesses between banging
on
one particular line a second time. This buffer is also SNOOPed acting like a victim cache. And likewise a similar buffer on the read side,
acting like a prefetch buffer. There is a connection between the buffers so that when ECC error is corrected, the corrected data is migrated back into DRAM.

Lets say L3 is 4 way assoc and all four in a L3 row been updated,
then a 5th way in that same row is written from L2.

L3 dumps a selected line into the DRAM write staging buffer. This
staging buffer is controlled by high and low water marks, and operated to minimize DRAM->CHIP and CHIP->DRAM bus turn arounds.
You try to insert refresh cycles on the DRAM while its pins are
doing their electrical turn around thing.

L3 has no place to hold that 5th way and it can't evict one
of the other 4 ways because that could cause rowhammer.

You typical L3 has a lot more ways than you postulate.

Seems to me that all it can do is stall the 5th write from L2 until
DRAM refresh rolls around and re-enables one of the pending L3 writes,
which would back up victim evicts from L2.
Or maybe L3 has a small fully assoc emergency overflow buffer,
but still that could fill up too.

Buffers my friend, buffers.