Re: ancient OS history, ARM is sort of channeling the IBM 360

Thomas Koenig wrote:

Michael S <already5chosen@yahoo.com> schrieb:

On Sun, 30 Jun 2024 10:44:34 -0000 (UTC)
Thomas Koenig <tkoenig@netcologne.de> wrote:
 

John Dallman <jgd@cix.co.uk> schrieb:

In article <87ed8e7os5.fsf@localhost>, lynn@garlic.com (Lynn
Wheeler) wrote:
 

back to IBM decision to add virtual memory to every 370 ... aka

MVT >> >> storage management was so bad that regions had to be
specified four >> >> times larger than used  

>
What was the problem with the memory management? My experience of
systems without virtual memory doesn't include any that shared

the >> > machine among several applications, so I have trouble
guessing.  >>

Imagine a process which resides at a certain address.  It contains
code, data, and pointers to data.  Now you swap it out and want
to reload it.  You can use the same base address, then everything
is fine.  Or you can use a different one, where do the pointers
point, especially registers which contain addresses?
 

 
Why would I want to use different address?

 
Memory overlap and fragmentation after having started and stopped
(or swapped out) too many processes.  Remember, these were
physical-memory machines.  You could load a process to a certain
place, but you had more running, and one of them was swapped out
or terminated, it left block of available memory where the next
process didn't necessarily fit.
 
They would have fared better by assigning a base register (or two,
one for data and one for code) invisible from problem state
and handled by the OS.

Precisely! This is what the, roughly contemporary, Univac 1108 did.  It
worked will for several decades.  Eventually the 1108's successors went
to a paging scheme (but with ~ 16 KB pages), to avoid the fragmentation
issues from using variable sized chunks (called banks in 1100
terminology) of memory.

Not sure why they didn't do so, but
reading the literature seems to imply that they did not think it
through.

Yes.  John Levine said they thought that changing the, user visible,
base registers would be doable  :-(

The invisible base registers may require an extra adder in the CPU when
computing addresses, but this is much less overhead than paging
requires.

Now, of course, we have the benefit of hindsight.

Yup!



--
 - Stephen Fuld
(e-mail address disguised to prevent spam)