Re: Architectural implications of locate mode I/O and channels

On Wed, 03 Jul 2024 13:34:39 -0400
EricP <ThatWouldBeTelling@thevillage.com> wrote:

Michael S wrote:

On Wed, 03 Jul 2024 08:44:01 -0400
EricP <ThatWouldBeTelling@thevillage.com> wrote:
 

An alternative is each device has its own DMA controller
which is just a couple of counters.
 

 
The main cost is not counters, but bus mastering logic.
For PCI it was non-trivial cost even as late as year 2000. For
example, PLX PCI to local bus bridges with bus mastering
capability, like PCI 9080 costed non-trivially more than slave-only
9060. 

 
PCI is a different matter. I think they shot themselves in the foot.
That is because the PCI design used FAST TTL and was ridiculously
complex and had all sorts of unnecessary optional features like
bridges.
>

Bridges were needed for the high-end. How else would you go over 4 or
5 slots with crappy edge conector of standard PCI? How else would you
go over 8-10 slots even with much much better Compact PCI connectors?
Bridges do not work very well in read direction, but in write direction
they do not impact performance at all.

To my eye the choice of FAST TTL looks wrong headed. They needed FAST
because they wanted to run at 33 MHz which is beyond LS TTL limit.
With a bus at 33 MHz and 4 bytes it superficially sounds like 133
MB/s. But 33 MHz was too fast to decode or latch the address and data,
plus it multiplexes address and data, and took 5 cycles to do a
transfer. So the bus actual data transfer rate was more like 133/5 =
26 MB/s.
 

But bursts work as advertaized.
We designed many boards PCI 32bx33MHz that sustained over 90 MB/s in
host memory to device direction and over 100 MB/s in device to host
memory.
Few still in produdction, although we will eventually move awayy from
this architectore for reason unrelated to system bus.

I looked into PCI bus interface chips when it first came out and there
were just *TWO* manufacturers for them on the planet, and they charged
$50,000 just to answer the phone, and you had to pay them to design a
custom chip for you even though it was supposed to be a standard
design. This all pushed the price of PCI cards way up so, for example,
an ISA bus modem card cost $50 but the exact same modem on PCI was
$250. No wonder most people stuck with ISA bus cards.
 

Sounds like very early days.

Whereas 74LS TTL was cheap and available from manufacturers
everywhere. I would have used 74LS TTL and done a straight 32-bit bus
with no options, multiplexed address and data to keep down the
connector pin count and cost. That could have run at 20 MHz which
leaves 50 ns for address and data decode and latch, and driven 8 bus
loads with no bridges. That gives 10 MT/s = 40 MB/s. Plus cheap and
widely available.
 

Pay attention that nothing of what you wrote above has anything to do
with difference between bus-mastering PCI devices and slave-only PCI
devices.