Re: PCIe MSI-X interrupts

On Page Request Services (PRS)
Device performs an Address Translation Request (ATS) to a page
which is not currently present in memory. So the I/O MMU sends
it a PTE which contains the not-present information.
But the system operates with nested paging. one manipulated
by Guest OS and the other manipulated by HyperVisor.
Yet device merely got "not-present"
So when device requests the page be brought in, how does the
I/O MMU know whether to interrupt Guest OS or to interrupt
Hypervisor to bring in the page and restart the command ??