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On Mon, 22 Jul 2024 17:51:21 +0300, Michael S wrote:
On Mon, 22 Jul 2024 13:41:40 +0000 mitchalsup@aol.com (MitchAlsup1)
wrote:
CDC 6600 had a RISC instruction set !!It has RISC-like features, most importantly load-store architecture.
>
Simple instruction formats and only two instruction width options
also sound RISCy. But hard coupling between A registers and X
registers does not look like RISC to me.
RISC-V is adopting a very similar idea, in preference to the
widespread current SIMD fashion.
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