Re: Arguments for a sane ISA 6-years later

On 7/29/2024 11:55 AM, Chris M. Thomasson wrote:

On 7/29/2024 12:25 AM, BGB wrote:

[...]

Though, one does have the issue that one can't just use cheap spinlocks.

 One note... Spinlocks work in a very weak memory model for sure. You just need the right memory barrier logic... For instance, SPARC in RMO mode wrt locking a spinlock and/or mutex requires a #LoadStore | #LoadLoad membar _after_ the atomic logic that actually locks it occurs. It also requires a release membar #LoadStore | #StoreStore _before_ the atomic logic that unlocks it takes place. Take note that #StoreLoad is _not_ required for a spinlock or a mutex in this context...

Basically:
______________________
atomic_lock();
   membar #LoadStore | #LoadLoad;
   {
       // inside the locked region...
   }
   membar #LoadStore | #StoreStore;
atomic_unlock();
______________________
atomic_lock/unlock are meant to be memory barrier free. Hopefully simple and efficient, say an XCHG (xchg had implied lock prefix) on the x86. Actually, one can release a spinlock on x86 with a single store (MOV) because of the implied release semantics wrt TSO. MOV instead of a locked RMW.
[...]