Re: Arguments for a sane ISA 6-years later

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Sujet : Re: Arguments for a sane ISA 6-years later
De : chris.m.thomasson.1 (at) *nospam* gmail.com (Chris M. Thomasson)
Groupes : comp.arch
Date : 31. Jul 2024, 08:13:44
Autres entêtes
Organisation : A noiseless patient Spider
Message-ID : <v8co79$1fu52$1@dont-email.me>
References : 1 2 3 4 5 6 7 8 9 10
User-Agent : Mozilla Thunderbird
On 7/30/2024 6:27 PM, jseigh wrote:
On 7/30/2024 4:26 PM, Chris M. Thomasson wrote:
On 7/30/2024 12:59 PM, jseigh wrote:
 
The folly library hazard pointers use that on windows,  membarrier() system call on linux (something else on older linuxes), to get rid of the expensive store/load memory barrier in hazard pointer loads.
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I need to check that out; thanks for the heads up. Fwiw, remember that old thread on comp.programming.threads where you first'ish published your ideas on RCU+SMR? I need to see if the folly library references your work. Also, remember when some paper from SUN or something was trying to claim your atomic_ptr logic? Iirc, we talked about it back on comp.arch, a long time ago...
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I remember you issued a "challenge like" post over on comp.programming.threads wrt detecting quiescent periods. Iirc, I was the first one to comment wrt a possible hackish solution using timing wrt kernel time. ;^)
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Something like 0.7 nsecs w/o membar vs 7.7 w/ membar.  The term I've seen being used now is asymmetric memory barrier.
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Big time! This is bringing back a lot of memories Joe. :^) Thanks.
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 I finally got around to writing a proxy version, smrproxy, here https://github.com/jseigh .  Also there's an atomic reference counted proxy, arcproxy.  Timings are here https://threadnought.wordpress.com/2023/06/09/smrproxy-timing-comparisons/ .
 smr is what I use to refer to hazard pointers.  In the original smrrcu, the rcu refered to the rcu polling of context switches which had the property of performing a memory barrier action.  I had to go through the linux proc filesystem for that.  Talk about pain.  I was really glad that somebody implemented membarrier().
 I also did a variation where you used local counters like when we were first messing with userspace rcu.  About the same performance but with an extra polling cycle (events vs conditions).  I tried to put in the same code as smrproxy but pseudo OO in C gets messy when you try to implement chimerical types, so I yanked it out.
Yup. Fwiw, I did one with local counters for a strange reference counting thing that was pretty damn local. It would allow a thread to gain a strong reference by incrementing a local pointer-based hashed reference count. Each thread would have a table of counters that pointers were hashed into.

atomic-ptr-plus is there but it's been copied from sourceforge to google to github.   I don't know if it's still intact.
 There's no attributions to anything in folly.
Your work with RCU+SMR would be a great reference to give.

It will probably end up like what's now called split reference counting which is now folklore according to a cppcon talk.
When I think of split counters for some reason I think of the per-thread counters that sum at intervals? :^) What about your differential reference counting? Works like a charm.
This was the base of it (atomic_ptr), right?
https://patents.justia.com/patent/5295262
I still like my very simple proxy thing here:
https://pastebin.com/raw/f71480694
https://groups.google.com/g/lock-free/c/X3fuuXknQF0
:^)

Date Sujet#  Auteur
24 Jul 24 * Arguments for a sane ISA 6-years later63MitchAlsup1
25 Jul 24 `* Re: Arguments for a sane ISA 6-years later62BGB
25 Jul 24  +* Re: Arguments for a sane ISA 6-years later57Chris M. Thomasson
26 Jul 24  i`* Re: Arguments for a sane ISA 6-years later56Anton Ertl
26 Jul 24  i +* Re: Arguments for a sane ISA 6-years later20BGB
29 Jul 24  i i`* Re: Arguments for a sane ISA 6-years later19Anton Ertl
29 Jul 24  i i +* Intel overvoltage (was: Arguments for a sane ISA 6-years later)2Thomas Koenig
29 Jul 24  i i i`- Re: Intel overvoltage1BGB
29 Jul 24  i i `* Re: Arguments for a sane ISA 6-years later16BGB
30 Jul 24  i i  `* Re: Arguments for a sane ISA 6-years later15Anton Ertl
30 Jul 24  i i   `* Re: Arguments for a sane ISA 6-years later14BGB
30 Jul 24  i i    +* Re: Arguments for a sane ISA 6-years later2Chris M. Thomasson
31 Jul 24  i i    i`- Re: Arguments for a sane ISA 6-years later1BGB
1 Aug 24  i i    `* Re: Arguments for a sane ISA 6-years later11Anton Ertl
1 Aug 24  i i     +- Re: Arguments for a sane ISA 6-years later1Michael S
1 Aug 24  i i     +* Re: Arguments for a sane ISA 6-years later8MitchAlsup1
1 Aug 24  i i     i+- Re: Arguments for a sane ISA 6-years later1Michael S
2 Aug 24  i i     i`* Re: Arguments for a sane ISA 6-years later6MitchAlsup1
2 Aug 24  i i     i +- Re: Arguments for a sane ISA 6-years later1Michael S
4 Aug 24  i i     i `* Re: Arguments for a sane ISA 6-years later4MitchAlsup1
5 Aug 24  i i     i  `* Re: Arguments for a sane ISA 6-years later3Stephen Fuld
5 Aug 24  i i     i   `* Re: Arguments for a sane ISA 6-years later2Stephen Fuld
5 Aug 24  i i     i    `- Re: Arguments for a sane ISA 6-years later1MitchAlsup1
1 Aug 24  i i     `- Re: Arguments for a sane ISA 6-years later1BGB
26 Jul 24  i +* Re: Arguments for a sane ISA 6-years later20MitchAlsup1
27 Jul 24  i i+- Re: Arguments for a sane ISA 6-years later1BGB
29 Jul 24  i i`* Memory ordering (was: Arguments for a sane ISA 6-years later)18Anton Ertl
29 Jul 24  i i +* Re: Memory ordering15MitchAlsup1
29 Jul 24  i i i+* Re: Memory ordering6Chris M. Thomasson
29 Jul 24  i i ii`* Re: Memory ordering5MitchAlsup1
30 Jul 24  i i ii `* Re: Memory ordering4Michael S
31 Jul 24  i i ii  `* Re: Memory ordering3Chris M. Thomasson
31 Jul 24  i i ii   `* Re: Memory ordering2Chris M. Thomasson
31 Jul 24  i i ii    `- Re: Memory ordering1Chris M. Thomasson
30 Jul 24  i i i`* Re: Memory ordering8Anton Ertl
30 Jul 24  i i i +* Re: Memory ordering2Chris M. Thomasson
30 Jul 24  i i i i`- Re: Memory ordering1Chris M. Thomasson
31 Jul 24  i i i `* Re: Memory ordering5MitchAlsup1
31 Jul 24  i i i  +- Re: Memory ordering1Chris M. Thomasson
1 Aug 24  i i i  `* Re: Memory ordering3Anton Ertl
1 Aug 24  i i i   `* Re: Memory ordering2MitchAlsup1
2 Aug 24  i i i    `- Re: Memory ordering1Anton Ertl
29 Jul 24  i i `* Re: Memory ordering2Chris M. Thomasson
30 Jul 24  i i  `- Re: Memory ordering1Chris M. Thomasson
29 Jul 24  i +* Re: Arguments for a sane ISA 6-years later13Chris M. Thomasson
29 Jul 24  i i+* Re: Arguments for a sane ISA 6-years later9BGB
29 Jul 24  i ii`* Re: Arguments for a sane ISA 6-years later8Chris M. Thomasson
29 Jul 24  i ii +- Re: Arguments for a sane ISA 6-years later1Chris M. Thomasson
29 Jul 24  i ii +* Re: Arguments for a sane ISA 6-years later2BGB
29 Jul 24  i ii i`- Re: Arguments for a sane ISA 6-years later1Chris M. Thomasson
30 Jul 24  i ii `* Re: Arguments for a sane ISA 6-years later4jseigh
30 Jul 24  i ii  `* Re: Arguments for a sane ISA 6-years later3Chris M. Thomasson
31 Jul 24  i ii   `* Re: Arguments for a sane ISA 6-years later2jseigh
31 Jul 24  i ii    `- Re: Arguments for a sane ISA 6-years later1Chris M. Thomasson
29 Jul 24  i i+- Memory ordering (was: Arguments for a sane ISA 6-years later)1Anton Ertl
29 Jul 24  i i`* Re: Arguments for a sane ISA 6-years later2MitchAlsup1
29 Jul 24  i i `- Re: Arguments for a sane ISA 6-years later1BGB
6 Aug 24  i `* Re: Arguments for a sane ISA 6-years later2Chris M. Thomasson
6 Aug 24  i  `- Re: Arguments for a sane ISA 6-years later1Chris M. Thomasson
26 Jul 24  `* Re: Arguments for a sane ISA 6-years later4MitchAlsup1
27 Jul 24   +- Re: Arguments for a sane ISA 6-years later1BGB
28 Jul 24   `* Re: Arguments for a sane ISA 6-years later2Paul A. Clayton
28 Jul 24    `- Re: Arguments for a sane ISA 6-years later1MitchAlsup1

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