Sujet : Re: Stealing a Great Idea from the 6600
De : mitchalsup (at) *nospam* aol.com (MitchAlsup1)
Groupes : comp.archDate : 01. Aug 2024, 01:38:03
Autres entêtes
Organisation : Rocksolid Light
Message-ID : <424255f43818a8a7d666b72b7e751542@www.novabbs.org>
References : 1 2 3 4 5 6 7 8 9 10 11 12
User-Agent : Rocksolid Light
On Wed, 31 Jul 2024 23:54:17 +0000, Lawrence D'Oliveiro wrote:
On Wed, 31 Jul 2024 14:48:58 +0000, MitchAlsup1 wrote:
>
On Wed, 31 Jul 2024 7:40:55 +0000, Michael S wrote:
>
How many instructions in flight are there on 1-wide in-order MIPS
R3000?
>
4 int or Mem up to 6 FP
>
How many on 1-wide in-order MIPS R4000?
>
6 Int or Mem up to 9 FP
>
But that’s just “pipelining”, isn’t it?
Yes, but both were 1-wide IO machines/pipelines
I am counting from the time the instruction leaves DECODE until
it finishes writing its result into the RF and can be discarded.
Re: Stealing a Great Idea from the 6600
Re: Stealing a Great Idea from the 6600