Sujet : Re: Decrement And Branch
De : mitchalsup (at) *nospam* aol.com (MitchAlsup1)
Groupes : comp.archDate : 15. Aug 2024, 22:02:09
Autres entêtes
Organisation : Rocksolid Light
Message-ID : <f0c953fbca86ace9ce153dafd30a6617@www.novabbs.org>
References : 1 2 3 4 5
User-Agent : Rocksolid Light
On Thu, 15 Aug 2024 10:39:28 +0000, Anton Ertl wrote:
mitchalsup@aol.com (MitchAlsup1) writes:
My 66000 finds use cases all the time, and I also have Branch on bit
instructions and have my CMP instructions build bit-vectors of outcomes.
>
If an architecture has the 88000-style treatment of comparison results
(fill a GPR with conditions, one bit per condition), instructions like
TBNZ and TBZ certainly are useful, but ARM A64 uses a condition code
register with NZCV flags for dealing with conditions, so what is TBNZ
and TBZ used for on this architecture?
if( x & (1<<7) )
if( !(x & (1<<7) )
Decrement And Branch
Re: Decrement And Branch