Re: My 66000 and High word facility

MitchAlsup1 <mitchalsup@aol.com> schrieb:

Based on the code I read out of Brian's compiler: there is no particular
need for 64-registers. I am already using only 72% of the instructions
{72% average, 70% geomean, 69% harmonic mean} that RISC-V requires
{same compiler, same optimizations, just different code generators}.

That's true - the code is usually expressed as a very straightforward
translation of the original code, at least for C.

Register pressure will increase for unrolling of outer loops,
for languages which use dope vectors (aka array descriptors),
and for more aggressive inlining.

Consider an argument passed as an assumed-shape array in
Fortran.

  subroutine foo(a)
    real, dimension(:,:)
 
where the array assumes the shape from the caller,
two-dimensional in this case.

For passing such an array, we need a base pointer and
information about

- the lower bound
- the  upper bound
- the stride

along each dimension, so it is 7 quantities in ths case.

One can argue that having 64-bit displacements is not-all-that-necessary
But how does one take dusty deck FORTRAN FEM programs and allow the
common blocks to grow bigger than 4GBs ?? This is the easiest way
to port code written 5 decades ago to use the sizes of memory they
need to run those "Great Big" FEM models today.

That is certainly one reason. Another is being able to have
a "huge" model with code > 2GB without too much effort.
Programs _are_ getting bigger...

Of course, it might be possible to code FMA like AVX does, with
only three registers - 18 bits for three registers, plus two bits
for which one of them gets smashed for the result.

>
Why do I get the feeling the compiler guys would not like this ??

Because they won't? :-)  It is certainly more straightforward
this way.