Sujet : Re: arm ldxr/stxr vs cas
De : jseigh_es00 (at) *nospam* xemaps.com (jseigh)
Groupes : comp.archDate : 10. Sep 2024, 22:34:28
Autres entêtes
Organisation : A noiseless patient Spider
Message-ID : <vbqe14$35sqv$1@dont-email.me>
References : 1 2 3 4 5 6 7 8 9 10 11
User-Agent : Mozilla Thunderbird
On 9/10/24 14:46, Chris M. Thomasson wrote:
On 9/10/2024 7:40 AM, jseigh wrote:
>
>
One of the things I have in my implementation is that an enqueue
operation can detect if wrap occurred if it got a interrupted by
a time slice end and log how far behind it got. I'm seeing about
200,000 enqueue operations in those cases. That would have been
a huge performance hit if my queue wasn't lock-free.
Is your queue similar to the M&S Queue?
https://people.csail.mit.edu/xchen/parallel-computing/queue.pdf
Yes.
arm ldxr/stxr vs cas
Re: arm ldxr/stxr vs cas