Sujet : Re: Tonights Tradeoff
De : mitchalsup (at) *nospam* aol.com (MitchAlsup1)
Groupes : comp.archDate : 11. Sep 2024, 23:30:31
Autres entêtes
Organisation : Rocksolid Light
Message-ID : <5e6f30ae726e3ae70fe6a3da1e3ef625@www.novabbs.org>
References : 1 2 3 4 5 6 7
User-Agent : Rocksolid Light
On Tue, 10 Sep 2024 14:58:30 +0000, Robert Finch wrote:
On 2024-09-10 3:00 a.m., BGB wrote:
>
I am not as much a fan of RISC-V's 'V' extension mostly in that it would
require essentially doubling the size of the register file.
>
The register file in Q+ is huge. One of the drawbacks of supporting
vectors. There were 1024 physical registers for support. Reduced it to
512 and that still may be too many. There was a 4kb wide mapping ram,
resulting in a warning message. I may have to split up components into
multiple copies to get the desired size to work.
VVM supports vectors as big as the implementation can handle with a
total
cost of 6-bits of state.