Sujet : Re: Computer architects leaving Intel...
De : david.brown (at) *nospam* hesbynett.no (David Brown)
Groupes : comp.archDate : 15. Sep 2024, 16:50:15
Autres entêtes
Organisation : A noiseless patient Spider
Message-ID : <vc6vno$285g2$1@dont-email.me>
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On 14/09/2024 21:26, Thomas Koenig wrote:
MitchAlsup1 <mitchalsup@aol.com> schrieb:
In many cases int is slower now than long -- which violates the notion
of int from K&R days.
That's a designers's choice, I think. It is possible to add 32-bit
instructions which should be as fast (or possibly faster) than
64-bit instructions, as AMD64 and ARM have shown.
For some kinds of instructions, that's true - for others, it's not so easy without either making rather complicated instructions or having assembly instructions with undefined behaviour (imagine the terror that would bring to some people!).
A classic example would be for "y = p[x++];" in a loop. For a 64-bit type x, you would set up one register once with "p + x", and then have a load with post-increment instruction in the loop. You can also do that with x as a 32-bit int, unless you are of the opinion that enough apples added to a pile should give a negative number of apples. But with a wrapping type for x - such as unsigned int in C or modulo types in Ada, you have little choice but to hold "p" and "x" separately in registers, add them for every load, and do the increment and modulo operation. I really can't see this all being handled by a single instruction.
Of course you could add a 32-bit zero extend or sign extend to many 32-bit ALU instructions and save some instructions - many architectures already support that kind of thing.
And having a smaller memory footprint is also beneficial, especially
for caches.
(Plus, there are FORTRAN's storage association rules, but these should
be less used by now. But for a 64-bit integer, they pretty much would
require a 64-bit REAL and a 128-bit DOUBLE PRECISION).