Re: Is Intel exceptionally unsuccessful as an architecture designer?

On Tue, 24 Sep 2024 07:50:36 +0200
Terje Mathisen <terje.mathisen@tmsw.no> wrote:

MitchAlsup1 wrote:

On Mon, 23 Sep 2024 7:53:36 +0000, Michael S wrote:
 

On Mon, 23 Sep 2024 01:34:55 +0000
mitchalsup@aol.com (MitchAlsup1) wrote:
 

On Mon, 23 Sep 2024 0:53:35 +0000, jseigh wrote:
 

On 9/22/2024 5:39 PM, MitchAlsup1 wrote: 

 

Speaking of memory models, remember when x86 didn't have
a formal memory model.  They didn't put one in until
after itanium.  Before that it was a sort of processor
consistency type 2 which was a real impedance mismatch
with what most concurrent software used a a memory model. 

>
When only 1 x86 would fit on a die, it really did not mater
much. I was at AMD when they were designing their memory
model.
 

Joe Seigh 

>
>
Why # of CPU cores on die is of particular importance? 

 
Prior to multi-CPUs on a die; 99% of all x86 systems were
mono-CPU systems, and the necessity of having a well known
memory model was more vague. Although there were servers
with multiple CPUs in them they represented "an afternoon
in the FAB" compared to the PC oriented x86s. 

 
When I started writing my first multi-threaded programs, I insisted
on getting a workstation with at least two sockets/cpus:
 
Somebody wiser than me had written something like "You cannot
write/test/debug multithreaded programs without the ability for
multiple threads to actually run at the same time."
 
Pretty obvious really, but the quote was sufficient to get my boss to
sign off on a much more expensive PC model. :-)
 
Terje
 

There are few situations where the difference between SC and weaker
memory ordering models does not manifest itself unless you have at
least 3 cores. Hopefully, it only matter for people that are doing
insane stuff.